JPS6121316Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to an interlocking drive control device for wipers and washers, and an object of the present invention is to provide a device that can interlock and control the drive of an automobile wiper and washer immediately after operating a switch. do.

The following is an example of the present invention shown in Figures 1 and 2.
One embodiment will be described with reference to the drawings in FIGS. AH.

In the circuit diagram of one embodiment of the device of the present invention shown in FIG. 1, 1 is a clock circuit, which is composed of a crystal oscillation circuit, a frequency dividing circuit, etc., and generates extremely stable pulses for displaying the time in an electronic automobile watch. Outputs a signal (hereinafter referred to as a clock signal). The device of the present invention extracts a relatively high frequency clock signal (50 Hz in this embodiment) from the clock circuit 1 and supplies this clock signal to a frequency dividing circuit 2 such as a counter. This frequency dividing circuit 2 divides the 50Hz clock signal into 1/2 as described later.
It divides the frequency into ⁶ , 1/2 ⁷ , 1/2 ⁸ , and inverter 3
Depending on the output of , a reset state in which the frequency division operation is stopped or a reset release state is set. on the other hand,
The first switch, SW ₁ , is a wiper speed changeover switch and is configured to be connected to one of four contacts: OFF, INT, LOW, and HIGH. The contact OFF is an empty contact, and the contact INT is connected to the reset terminal of the frequency divider circuit 2 via the inverter 3, while it is directly connected to one input terminal of the two-input NOR gate 4. The other input terminal of this NOR gate 4 is the contact above.
It is connected to LOW and grounded via resistor _R3 . The output terminal of the NOR gate 4 is connected to one input terminal of a two-input NAND gate 7 via an inverter 5.

On the other hand, the frequency divider circuit 2 has three output terminals.
The above NAND gate 7 via the input NOR gate 6
is connected to the other input terminal of This NAND
The output terminal of gate 7 is connected to the base of PNP transistor T _r via resistor R ₁ . A parallel circuit consisting of a protective diode _D4 and a relay coil 8-1 is connected between the collector of the transistor T _r and ground. Further, a normally open relay switch 8-2, which is closed only when the relay coil 8-1 is energized, and a wiper drive motor 9 are connected in series between the DC voltage source and the ground.

A capacitor C ₁ and a resistor R ₄ are connected in series between the emitter and base of the transistor T _r , and the connection point between the capacitor C ₁ and the resistor R ₁ is connected to a normally open washer switch SW ₂ (second grounded via the switch). A washer drive motor 10 is connected between the non-grounded terminal of the washer switch SW ₂ and a DC voltage source.

Next, the operation of the wiper and washer interlocking drive control device configured as described above will be explained. first,
When the switch SW ₁ is connected to its contact OFF, the frequency dividing circuit 2 is in the reset state, the output h of the NAND gate 7 is at the H level, the transistor T _r is OFF, and the motor 9 is stopped. . In addition, switch SW ₂ is normally open, and motor 10
has also stopped. From this state, when switch SW ₁ is connected to its contact INT at time t ₁ , the output a of inverter 3 changes from H level to L level as shown in Figure 2A, and the reset state of frequency divider circuit 2 is released. do. As a result, the frequency divider circuit 2 immediately starts frequency dividing operation, and produces pulse b as shown in Figure 2B obtained by dividing the 50Hz clock signal into 1/2 ⁶ , and pulse b obtained by dividing the 50Hz clock signal into 1/2 ⁷ . The pulse c as shown in C of the same figure obtained by doing this, and the pulse d shown in D of the same figure obtained by dividing the frequency by 1/2 ⁸ , respectively.
Applied to NOR gate 6. This NOR gate 6 outputs a high level pulse only when input pulses b, c and d are all low level, so the NOR
As shown in FIG. 2E, the gate 6 outputs a pulse e having an H level pulse width of about 0.64 seconds, which is equal to that of pulse b, and a period of 5.12 seconds, which is equal to that of pulse d. is applied to one input terminal of Here, as is clear from Fig. 2 B to E, pulses b, c, and d are pulsed for about 0.64 seconds from time t ₁ when switch SW ₁ is connected to contact INT.
Since both are at the L level, the output e of the NOR gate 6 remains at the H level for about 0.64 seconds immediately after time _t1 .

On the other hand, the positive DC power supply voltage is applied to the NOR gate 4 whose one end is grounded via the switch SW ₁ , where the polarity is inverted and the pulse f of the L level as shown in FIG. Furthermore, a pulse g whose polarity is inverted and set to H level as shown in FIG. 3G is applied to the other input terminal of the NAND gate 7. Therefore, as shown in FIG. 2H, this NAND gate 7 takes out a pulse h, which is the output pulse e of the NOR gate 6 with its polarity inverted, and this pulse h is applied to the base of the transistor T _r through the resistor R ₁ . It is turned on during the L level period and turned off during the H level period.
Therefore, the relay coil 8-1 has only the ON period of this transistor T _r , that is, the L of the pulse h.
Current flows only during the level period, and this relay coil 8
Relay switch 8-2, which is normally open when -1 is energized.
is closed and the motor 9 rotates at a low speed. Further, during the H level period of the pulse h, the relay switch 8-2 is returned to the open state by turning off the transistor T _r , and therefore the motor 9 stops its rotation.

Therefore, the wiper for wiping raindrops off the windshield of a car alternates between being driven for 0.64 seconds, which is the L level period of pulse h, and stopping for 4.48 seconds, which is the H level period of pulse h. Performs intermittent movements that are repeated repeatedly. In this way, the wiper is driven and controlled intermittently at extremely accurate time intervals by the frequency-divided clock signal from the clock circuit 1. At this time, the pulse h is
As shown in switch SW ₁ contact INT connection time t ₁
Since it is always at the L level for 0.64 seconds, the motor 9 is started immediately from time _t1 , and the intermittent operation of the wiper is started.

Next, when the switch SW ₁ is connected to the contact OFF again at time t ₂ , the two input terminals of the NOR gate 4 are grounded via the resistors R ₂ and R ₃ , respectively, so the output g of the inverter 5 becomes the second As shown in Figure G, it becomes L level, and regardless of the level of input pulse e of NAND gate 7, its output h becomes H level as shown in Figure H.
level. At the same time, inverter 3
Since the input terminal of is grounded through resistor R ₂ ,
The output a changes from the L level to the H level at time _t2 as shown in FIG. 2A, setting the frequency dividing circuit 2 in a reset state and stopping the frequency dividing state. As a result, the transistor T _r is always turned off, the rotation of the motor 9 continues to stop, and the wiper is not driven.

On the other hand, when switch SW ₁ is switched from contact OFF to LOW, the input terminal of inverter 3 is connected to resistor R ₂
Since it remains connected to ground via the terminal, its output remains at H level and does not change. Therefore, frequency divider circuit 2 remains in the reset state and NOR gate 6
The output remains at H level. Also switch
Since a positive DC power supply voltage is applied to one input terminal of the NOR gate 4 via SW ₁ , the output of the inverter 5 changes from L level to H level.
Therefore, since H level signals are applied to both input terminals of the NAND gate 7, the output of the NAND gate 7 becomes an L level, and the transistor T _r
Turn on. When the terminal of switch SW ₁ is connected to LOW, frequency divider circuit 2 does not operate, so the above
The output of the NAND gate 7 never becomes H level, so the transistor T _r is always turned on and the motor 9 continues to rotate at a predetermined low speed. Therefore, the wiper is driven continuously at low speed without interruption.

The above is the operation when wiper switch SW ₁ is operated with watch switch SW ₂ open, but according to the device of the present invention,
The washer and wiper can be linked together. That is, when the switch SW ₁ is connected to the contact OFF and the switch SW ₂ is closed while the rotation of the motor 9 is stopped, the connection point between the capacitor C ₁ and the resistor R ₄ is connected to the switch SW _2. Since the base potential of the transistor T _r is lowered, the transistor T _r is turned on. As a result, the motor 9 begins to rotate as described above, and the wiper is driven. Also switch
At the same time as SW ₂ is closed, the motor 10 starts rotating and the washer is driven. Therefore, the wiper and washer are driven in conjunction with each other by closing the switch _SW2 . Note that the watch drive motor 10 stops rotating immediately when the switch SW ₂ is opened, but the wiper drive motor 9 stops rotating after a time delay according to a time constant determined by the values of C ₁ and R ₄ from the time when the switch SW ₂ is opened. The rotation is stopped by automatically turning off the transistor T _r . However, at this time, the wiper is configured to stop when it reaches the lowest position due to a self-holding circuit (not shown).

The above switch SW ₁ is the contact INT or LOW
Even if the switch SW ₂ is closed while the washer drive motor 10 is connected to the washer drive motor 10, the washer drive motor 10 will rotate normally.

As mentioned above, the wiper and washer interlocking drive control device according to the present invention includes a first motor for driving the wiper, a second motor for driving the washer, and a first motor for driving the washer immediately after the operation of the first switch. A circuit that divides the frequency of the signal taken out from the clock circuit of the electronic clock after releasing the reset and forms a pulse signal of a predetermined pulse width from the frequency-divided signal, and a circuit that is supplied with the pulse signal and immediately after operating the first switch. a drive circuit that controls the rotation of the first motor; a second switch that energizes and rotates the second motor when operated by the drive circuit; and a drive circuit that receives a signal supplied by the operation of the second switch. Since the configuration includes means for supplying a signal for rotating the first motor separately from the pulse signal, the time interval during the intermittent operation of the wiper is accurate, and the wiper is started immediately after the operation of the first switch. The wiper and washer can be driven intermittently, and when both the wiper and washer are not being driven, the wiper and washer can be controlled in conjunction with each other by operating the switch, and even when the wiper is being driven by the input signal, By operating the above-mentioned switch, it is possible to drive and control the washer and the wiper at the same time.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the device of the present invention;
2A to 2H are signal waveform diagrams for explaining the operation of FIG. 1, respectively. 1... Clock circuit, 2... Frequency dividing circuit, 8-1...
Relay coil, 8-2... Relay switch, 9...
... Wiper drive motor, 10... Washer drive switch, SW ₁ ... Wiper speed changeover switch, SW ₂ ... Washer switch.

Claims (1)

[Scope of utility model registration request] a first motor for driving the wiper; a second motor for driving the washer; and a first motor for driving the washer.
A circuit that divides the frequency of the signal taken out from the clock circuit of the electronic clock after the reset is released immediately after the switch is operated, and forms a pulse signal of a predetermined pulse width from the frequency-divided signal, and a circuit that is supplied with the pulse signal and that 1st
a drive circuit that controls the rotation of the first motor immediately after the operation of the switch;
a second switch that energizes and rotates the motor; and a signal supplied by the operation of the second switch that is input to the drive circuit to cause the first motor to rotate. An interlocking drive control device for a wiper and a washer, which includes separate supply means.