JPS61195699U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional example of an audio signal processing device, Fig. 2 is a block diagram showing a specific configuration of a reverberation generator in the device shown in Fig. 1, and Fig. 3 shows an embodiment of the present invention. Block diagram, Figures 4 and 5
The figure is a diagram showing the operation of the apparatus of FIG. 3. Explanation of symbols of main parts, 2... Reverberation generator, 3
...Delay unit, 24...ALU, 25, 26...R
AM, 27, 28...Address controller, 2
9...Random generator, 30...System controller.

Claims (1)

[Scope of utility model registration request] An audio signal processing device that performs reverberation processing on an input analog audio signal and outputs it as a first channel audio signal, and performs delay processing on the first channel audio signal and outputs it as a second channel audio signal, the first channel Audio signal is A/
A/D conversion means for converting the digital value into a D-converted digital value; a writable/readable memory having a plurality of storage locations; and a predetermined one of the plurality of storage locations in synchronization with the predetermined timing. Sequentially generating write address values and first and second read address values specified under the circular order;
An address that changes the second read address value to a random value different from the write address value at that time every predetermined period, and sets the second read address value before the change as the new first read address value. a control means, in synchronization with the predetermined timing, writes the digital value to the storage location of the memory designated by the write address value, and writes the contents of the storage location of the memory designated by the first read address value to a first read address value; memory control means for reading as a data value and reading out the contents of the storage location of the memory specified by the second read address value as a second data value, the first data value decreasing and the second data value increasing; arithmetic means for crossfading the first and second data values at each predetermined cycle; and D/A conversion for converting the output value of the arithmetic means into the second channel audio signal. An audio signal processing device comprising: means.