JPH0214151U - - Google Patents
Info
- Publication number
- JPH0214151U JPH0214151U JP9026388U JP9026388U JPH0214151U JP H0214151 U JPH0214151 U JP H0214151U JP 9026388 U JP9026388 U JP 9026388U JP 9026388 U JP9026388 U JP 9026388U JP H0214151 U JPH0214151 U JP H0214151U
- Authority
- JP
- Japan
- Prior art keywords
- eprom
- data
- recorded data
- counter
- stores
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Description
第１図はこの考案の一実施例による疑似信号発
生器を示すブロツク図、第２図ａ，ｂは第１図に
示すＥＰＲＯＭ１の内容とＥＰＲＯＭ２の内容を
示す図、第３図は第１図の送信制御器の出力タイ
ミング図、第４図はこの考案の他の実施例を示す
時刻発生器と論利和回路を付加した疑似信号発生
器を示すブロツク図、第５図は従来の疑似信号発
生器を示すブロツク図、第６図は第５図の１７の
信号発生制御器の出力タイミング図である。
１はＥＰＲＯＭ１、２はマイクロコンピユータ
、３はアツプカウンタ、４はダウンカウンタ、５
はクロツク発生器、６はＥＰＲＯＭ２、７はレジ
スタ、８は送信制御器、９は変換装置、１０はシ
ステムコンピユータ、１１は時刻発生器、１２は
論理和回路、１３はスイツチ、１４はレジスタ、
１５はスイツチ、１６はレジスタ、１７は信号発
生制御器。なお、図中、同一符号は同一、又は相
当部分を示す。
FIG. 1 is a block diagram showing a pseudo signal generator according to an embodiment of this invention, FIGS. 2a and b are diagrams showing the contents of EPROM 1 and EPROM 2 shown in FIG. 1, and FIG. Fig. 4 is a block diagram showing a pseudo signal generator with a time generator and a logical sum circuit added, which shows another embodiment of this invention, and Fig. 5 shows a conventional pseudo signal generator. FIG. 6 is an output timing chart of the signal generation controller 17 shown in FIG. 5. 1 is EPROM 1, 2 is a microcomputer, 3 is an up counter, 4 is a down counter, 5
is a clock generator, 6 is an EPROM 2, 7 is a register, 8 is a transmission controller, 9 is a converter, 10 is a system computer, 11 is a time generator, 12 is an OR circuit, 13 is a switch, 14 is a register,
15 is a switch, 16 is a register, and 17 is a signal generation controller. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
の記録データを出力するために必要な制御データ
を記憶するＥＰＲＯＭ１と、制御データを読み込
み実際に制御を行うマイクロコンピユータと、記
録データをＥＰＲＯＭ２から出力するためのアド
レス更新用のアツプカウンタ及び記録データの出
力ワード数を計数するダウンカウンタとを備えた
ことを特徴とする疑似信号発生器。 An EPROM 2 that stores simulated recording data, an EPROM 1 that stores control data necessary to output the recorded data, a microcomputer that reads the control data and performs actual control, and an address for outputting the recorded data from the EPROM 2. A pseudo signal generator comprising an up counter for updating and a down counter for counting the number of output words of recorded data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9026388U JPH0214151U (en) | 1988-07-07 | 1988-07-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9026388U JPH0214151U (en) | 1988-07-07 | 1988-07-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0214151U true JPH0214151U (en) | 1990-01-29 |
Family
ID=31314789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9026388U Pending JPH0214151U (en) | 1988-07-07 | 1988-07-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0214151U (en) |
-
1988
- 1988-07-07 JP JP9026388U patent/JPH0214151U/ja active Pending
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