JPS61193423A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS61193423A
JPS61193423A JP60032626A JP3262685A JPS61193423A JP S61193423 A JPS61193423 A JP S61193423A JP 60032626 A JP60032626 A JP 60032626A JP 3262685 A JP3262685 A JP 3262685A JP S61193423 A JPS61193423 A JP S61193423A
Authority
JP
Japan
Prior art keywords
irradiation
sample
layer
oxide film
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60032626A
Other languages
Japanese (ja)
Inventor
Osamu Okura
理 大倉
Kikuo Kusukawa
喜久雄 楠川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60032626A priority Critical patent/JPS61193423A/en
Publication of JPS61193423A publication Critical patent/JPS61193423A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To prevent the generation of defective crystal growth by a method wherein an amorphous thin film is constituted using at least two kinds of material of a dielectric thin film, which works as an electric insulator,and a high heat conducting material with which a radiating action is performed, and the heat generated by the irradiation of a laser beam is diffused not only in the depthwise direction of the sample, but also in the transverse direction. CONSTITUTION:First, after a thermal oxide film SiO2 of 200nm is thickness if formed on a single crystal silicon face 100 substrate 1, a polysilicon film 3 of 300nm is formed thereon, and the oxide film of 800nm is formed. After a part of the oxide film 4 is etched, a polysilicon layer 5 of 400nm is formed on the whole surface of a sample. When a laser irradiation is performed on the above-mentioned structure, heat is diffused in the vertical direction through the polycrystalline silicon layer 3, the difference of the apparent thermal conductivity is made smaller, and the polycrystalline silicon layer 5 begins to fuse on the whole surface of the sample. As a result, said layer is turned to excellent single crystal after irradiation of the laser beam.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体装置の製造方法に関し、詳しくは単結晶
半導体基板上に形成した電気的絶縁薄膜上に更に上記単
結晶基板を損うことなく単結晶半導体薄膜を形成する方
法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, a method for manufacturing a semiconductor device, and more specifically, a method for manufacturing a semiconductor device. The present invention relates to a method of forming a crystalline semiconductor thin film.

〔発明の背景〕[Background of the invention]

非晶質基板或いは薄膜上に単結晶領域を形成する方法の
１つとして、上記非晶質領域上に単結晶化すべき多結晶
層もしくは非晶質層を堆積し、これに大出力レーザ光を
照射し、これを融解せしめその再結晶化過程においてこ
れを単結晶化する方法が提案されている。この中でもブ
リッジングエピタキシー法（特開昭５６−７３６９７）
は上記非晶質上に一部単結晶基板が露出する開口部を設
け、この領域の面方位を以て再結晶化領域の面方位を制
御できる点で応用範囲が広いと考えられている。ところ
で、この方法では熱伝導率の約２桁異なる単結晶基板及
び非晶質基板上の上記堆積層を同時に融解する必要があ
り、このためにレーザ光の適正照射条件を求める事が困
難となっている。又、更にその他の方法を用いる場合も
含めてレーザ照射の際の下層単結晶基板領域への熱影響
を防止する事は重要な課題となっている。One method for forming a single crystal region on an amorphous substrate or thin film is to deposit a polycrystalline layer or an amorphous layer to be made into a single crystal on the amorphous region, and then apply a high-power laser beam to this layer. A method has been proposed in which the material is irradiated, melted, and made into a single crystal in the recrystallization process. Among these, bridging epitaxy method (Japanese Patent Application Laid-Open No. 56-73697)
The method is thought to have a wide range of applications in that it is possible to provide an opening on the amorphous substrate through which a portion of the single crystal substrate is exposed, and to control the orientation of the recrystallized region using the orientation of this region. By the way, in this method, it is necessary to simultaneously melt the deposited layers on the single crystal substrate and the amorphous substrate, which have thermal conductivities that differ by about two orders of magnitude, which makes it difficult to find the appropriate irradiation conditions for the laser beam. ing. Furthermore, even when using other methods, it is an important issue to prevent thermal effects on the lower single crystal substrate region during laser irradiation.

〔発明の目的〕[Purpose of the invention]

本発明の目的は上記従来の問題点を解決し、下層基板を
損うことなく良質な単結晶層を非晶質薄膜上に形成する
方法を提供することにある。　　゛〔発明の概要〕 上記の熱伝導率の差異に起因する問題を解決するには基
本的には上記非晶質薄膜の膜厚を小さくすれば良いと考
えられるが、このような方法では下層基板への熱流を増
大させるために、下層基板保護の観点からは良策とは占
えない。An object of the present invention is to solve the above-mentioned conventional problems and provide a method for forming a high-quality single crystal layer on an amorphous thin film without damaging the underlying substrate.゛ [Summary of the Invention] In order to solve the problem caused by the difference in thermal conductivity, it is basically considered that the thickness of the amorphous thin film described above can be reduced. Since it increases the heat flow to the substrate, it is not a good idea from the viewpoint of protecting the underlying substrate.

そこで本発明では■−上記非晶質薄膜電気的絶縁体とし
て作用する誘電薄膜及び放熱作用を行なう高熱伝導材料
の少なくとも２種類の材料の組合せを用いて構成し、レ
ーザ照射によって発生する熱を試料の深さ方向のみなら
ず横方向に拡散させることを特徴としている。Therefore, in the present invention, the heat generated by laser irradiation is absorbed by the sample using a combination of at least two types of materials: (1) the above-mentioned amorphous thin film dielectric thin film that acts as an electrical insulator, and a highly thermally conductive material that performs heat dissipation. It is characterized by being diffused not only in the depth direction but also in the lateral direction.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を図により説明する。 Embodiments of the present invention will be described below with reference to the drawings.

まず単結晶シリコン（１００）開基板１上に厚さ２００
ｎｍの熱酸化膜（ＳｉＯ２）２を形成した後、この−Ｌ
に３００ｎｍの多結晶シリコン層３を形成し、更に８０
０　ｎ　ｍの酸化膜４をｃ　ｖ　ｎ法により形成した。First, monocrystalline silicon (100) was deposited on an open substrate 1 to a thickness of 200.
After forming a thermal oxide film (SiO2) 2 of nm thickness, this -L
A polycrystalline silicon layer 3 of 300 nm is formed on
An oxide film 4 having a thickness of 0 nm was formed by the cvn method.

（第１図）この後、このようにして形成した層の１部を
ホトリソグラフィ工程によるパターニングによってエツ
チングした後に４００ｎｍの多結晶シリコン層５を４−
記試料ヒ全面に形に３） 成した（第２図）。(FIG. 1) After that, a part of the layer thus formed is etched by patterning using a photolithography process, and then a 400 nm thick polycrystalline silicon layer 5 is etched by 4-400 nm.
A shape was formed on the entire surface of the sample (Fig. 2).

以上の−し程によって得られた構造に対し、レーザ照射
を行なった。照射にはアルゴンイオンレーザ光６を用い
、試料温度を４００〜５００℃に保ちながら、照射パワ
ー５〜１５Ｗ、ビーム走査速度１〜’Ｌ　ＯＯｒｘａ　
／　ｓで行なった。尚、この時ビーム直径は３３０〜１
００μｍに集光した従来多結晶シリコン層３を含まない
構造の試料。The structure obtained through the above steps was irradiated with a laser. Argon ion laser beam 6 was used for irradiation, and while keeping the sample temperature at 400 to 500°C, the irradiation power was 5 to 15 W, and the beam scanning speed was 1 to 'LOOrxa.
/s. In addition, the beam diameter at this time is 330~1
A sample with a conventional structure that does not include a polycrystalline silicon layer 3 with light focused at 00 μm.

即ち１μｍ膜厚の熱酸化膜を用いた試料では、レーザ照
射に伴って試料−に全面の多結晶シリコン層５が同時に
融解するような照射条件は存在しなかった。これは酸化
膜の熱伝導率がシリコン基板のそれよりも約２指示さい
ことに起因するもので、照射エネルギが小さい場合は開
１−１部上の多結晶シリコン層のみが融解せず、エネル
ギを大きくすると開口部外の領域で多結晶シリコン層が
蒸発してしまうためである。That is, in the sample using a thermal oxide film with a thickness of 1 μm, there were no irradiation conditions such that the polycrystalline silicon layer 5 on the entire surface of the sample melted at the same time with laser irradiation. This is because the thermal conductivity of the oxide film is about 2 orders of magnitude lower than that of the silicon substrate, so when the irradiation energy is small, only the polycrystalline silicon layer on the opening 1-1 does not melt, and the energy This is because if the value is increased, the polycrystalline silicon layer will evaporate in the area outside the opening.

これに対して本実施例の構造を用いた場合には多結晶シ
リコン層３を通して熱が紙面垂直方向に拡散するために
見かけ」二熱伝導率の差が小さくなり試料全面の領域で
多結晶シリコン層５の融解が生じ、その結果として照射
後の当該層は良質の単結晶となった。On the other hand, when the structure of this example is used, heat diffuses through the polycrystalline silicon layer 3 in the direction perpendicular to the plane of the paper, so that the difference in apparent thermal conductivity becomes small, and the polycrystalline silicon layer 3 Melting of layer 5 took place, so that after irradiation the layer became a single crystal of good quality.

尚、本実施例では酸化膜２及び４の間に伝熱材として多
結晶シリコン３を用いたが、酸化膜より熱伝導率の高い
材料であれば他の物質を用いればその効果には基本的に
は変わりはなく、モリブデンやタングステンなどの高融
点金属を用いれば更に良好な結果が得られる事は言うま
でもない。In this example, polycrystalline silicon 3 was used as a heat transfer material between the oxide films 2 and 4, but other materials with higher thermal conductivity than the oxide film can be used to improve the effect. Needless to say, even better results can be obtained if a high melting point metal such as molybdenum or tungsten is used.

〔発明の効果〕〔Effect of the invention〕

１：、記説明から明らかなように、本発明によれば従来
問題となっていた熱伝導率の差異に起因する結晶成長不
良を回避することが可能となる。1: As is clear from the description, according to the present invention, it is possible to avoid defective crystal growth caused by a difference in thermal conductivity, which has been a problem in the past.

【図面の簡単な説明】[Brief explanation of drawings]

第１図、第２図は本発明の実施例における試料の断面構
造を示したものである。 １・・・シリコン単結晶基板、２，４・・・酸化シリコ
ン薄膜、３，５・・多結晶シリコン薄膜、６・・レーザ
光。FIGS. 1 and 2 show the cross-sectional structure of a sample in an example of the present invention. 1... Silicon single crystal substrate, 2, 4... Silicon oxide thin film, 3, 5... Polycrystalline silicon thin film, 6... Laser light.

Claims (1)

【特許請求の範囲】[Claims] 　単結晶半導体基板上に絶縁膜を介して堆積した多結晶
もしくは非晶質半導体層をレーザ光もしくは電子線など
のエネルギー粒子の照射による局所加熱を用いて融解・
再固化せしめ当該層を単結晶化する工程において、上記
絶縁膜中の一部に高熱伝導材料を含ませることを特徴と
する半導体装置の製造方法。A polycrystalline or amorphous semiconductor layer deposited on a single-crystal semiconductor substrate via an insulating film is melted using local heating by irradiation with energetic particles such as laser light or electron beams.
A method for manufacturing a semiconductor device, characterized in that in the step of resolidifying the layer to single crystallize it, a part of the insulating film contains a highly thermally conductive material.
JP60032626A 1985-02-22 1985-02-22 Manufacture of semiconductor device Pending JPS61193423A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60032626A JPS61193423A (en) 1985-02-22 1985-02-22 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60032626A JPS61193423A (en) 1985-02-22 1985-02-22 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS61193423A true JPS61193423A (en) 1986-08-27

Family

ID=12364059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60032626A Pending JPS61193423A (en) 1985-02-22 1985-02-22 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS61193423A (en)

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