JPS6118968B2 - - Google Patents
Info
- Publication number
- JPS6118968B2 JPS6118968B2 JP11032878A JP11032878A JPS6118968B2 JP S6118968 B2 JPS6118968 B2 JP S6118968B2 JP 11032878 A JP11032878 A JP 11032878A JP 11032878 A JP11032878 A JP 11032878A JP S6118968 B2 JPS6118968 B2 JP S6118968B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- bridge circuit
- power supply
- diffused
- semiconductor pressure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 15
- 238000001514 detection method Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000009530 blood pressure measurement Methods 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 238000005259 measurement Methods 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 230000002194 synthesizing effect Effects 0.000 description 1
Landscapes
- Measuring Fluid Pressure (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
Description
【発明の詳細な説明】
本発明はブリツジ回路の一部にピエゾ抵抗（以
下、拡散抵抗と指称する）を拡散した半導体感圧
素子を用いた半導体式圧力伝送器に係り、特に感
圧素子のＰ−Ｎ接合部における逆バイアス電圧の
変化に起因して生ずる拡散抵抗の変化の影響を除
去する半導体式圧力伝送器に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor pressure transmitter using a semiconductor pressure-sensitive element in which a piezoresistance (hereinafter referred to as a diffused resistance) is diffused in a part of a bridge circuit. The present invention relates to a semiconductor pressure transmitter that eliminates the effects of changes in diffusion resistance caused by changes in reverse bias voltage at a PN junction.
一般に、半導体感圧素子はＰ型半導体を拡散し
たＰ型拡散抵抗層およびこの拡散抵抗層のベース
となるＮ型基板間（以下、Ｐ−Ｎ接合部と指称す
る）に逆バイアス電圧を印加し、拡散抵抗を流れ
る電流が基板にリークするのを防止している。 Generally, in a semiconductor pressure-sensitive element, a reverse bias voltage is applied between a P-type diffused resistance layer in which a P-type semiconductor is diffused and an N-type substrate that is the base of this diffused resistance layer (hereinafter referred to as a P-N junction). , which prevents the current flowing through the diffused resistor from leaking into the substrate.
ところで、逆バイアス電圧は上述したように基
板に印加しているため、拡散抵抗の電位が変化す
るとＰ−Ｎ接合部の逆バイアス電圧が変化する。
この結果、Ｐ−Ｎ接合部の空乏層が変化しこれが
拡散抵抗の抵抗値の変化として現われるので、ブ
リツジ回路から出力される圧力測定信号が圧力変
化とは無関係に変動し高精度に測定ができない欠
点がある。 By the way, since the reverse bias voltage is applied to the substrate as described above, when the potential of the diffused resistor changes, the reverse bias voltage of the PN junction changes.
As a result, the depletion layer at the P-N junction changes and this appears as a change in the resistance value of the diffused resistor, so the pressure measurement signal output from the bridge circuit fluctuates independently of pressure changes, making it impossible to measure with high precision. There are drawbacks.
そこで、本発明は上記実情にかんがみてなされ
たものであつて、半導体感圧素子のＰ−Ｎ接合部
に逆バイアスとして加える電圧とは別に、通常ブ
リツジ回路の給電端子に供給する所定電圧を交互
に与えてブリツジ回路の圧力測定信号を平均化し
て出力しＰ−Ｎ接合部における空乏層の変化によ
る拡散抵抗の影響を除去する半導体式圧力伝送器
を提供するものである。 Therefore, the present invention has been made in view of the above-mentioned circumstances, and in addition to the voltage applied as a reverse bias to the P-N junction of the semiconductor pressure-sensitive element, a predetermined voltage normally supplied to the power supply terminal of the bridge circuit is alternately applied. The present invention provides a semiconductor pressure transmitter that averages and outputs the pressure measurement signal of the bridge circuit based on the voltage applied to the bridge circuit, and eliminates the influence of diffusion resistance due to changes in the depletion layer at the PN junction.
以下、本発明の一実施例について図面を参照し
て説明する。同図において１０は測定のサンプリ
ング周期を決めるパルスを発生するパルス発振部
であつて、これの出力部にブリツジ回路１１の印
加電圧を調整する電圧調整部１２が接続されてい
る。この電圧調整部１２の出力部はインバータ回
路１３を介してブリツジ回路１１の一方給電端子
○イに接続され、また電圧調整部１２の出力部は直
接ブリツジ回路１１の他方給電端子○ロにそれぞれ
接続されている。 An embodiment of the present invention will be described below with reference to the drawings. In the figure, reference numeral 10 denotes a pulse oscillation section that generates pulses that determine the sampling period of measurement, and a voltage adjustment section 12 that adjusts the voltage applied to the bridge circuit 11 is connected to the output section of this oscillation section. The output part of this voltage regulator 12 is connected to one power supply terminal ○a of the bridge circuit 11 via an inverter circuit 13, and the output part of the voltage regulator 12 is directly connected to the other power supply terminal ○b of the bridge circuit 11. has been done.
このブリツジ回路１１は抵抗Ｒ１〜Ｒ４で構成
されこのうち抵抗Ｒ１，Ｒ２は半導体感圧素子の
拡散抵抗であつて逆バイアス電圧Ａで制御される
空乏層１４，１５によつてその抵抗値が決定され
る。演算増幅器１６およびコンデンサ１８は拡散
抵抗Ｒ１の両端電圧を検出する第１の電圧検出手
段として構成され、この増幅器の正入力部はブリ
ツジ回路１１の一方給電端子○イに、負入力部はブ
リツジ回路１１の一方出力端子○ハに接続されてい
る。また、演算増幅器１７およびコンデンサ１９
は拡散抵抗Ｒ２の両端電圧を検出する第２の電圧
検出手段であつて、この演算増幅器１７の正入力
部はブリツジ回路１１の出力端子○ハに、負入力部
はブリツジ回路１１の他方給電端子○ロに接続され
ている。そして、これら両増幅器１６，１７の出
力部はそれぞれコンデンサ１８，１９を介して圧
力伝送器の出力端に共通接続され、前記両電圧検
出手段で検出された検出電圧を合成する電圧合成
手段を構成している。 This bridge circuit 11 is composed of resistors R1 to R4, of which resistors R1 and R2 are diffused resistors of semiconductor pressure-sensitive elements, and their resistance values are determined by depletion layers 14 and 15 controlled by reverse bias voltage A. be done. The operational amplifier 16 and the capacitor 18 are configured as a first voltage detection means for detecting the voltage across the diffused resistor R1. 11 is connected to one output terminal ○c. In addition, an operational amplifier 17 and a capacitor 19
is a second voltage detection means for detecting the voltage across the diffused resistor R2, the positive input part of this operational amplifier 17 is connected to the output terminal ○C of the bridge circuit 11, and the negative input part is connected to the other power supply terminal of the bridge circuit 11. ○ Connected to RO. The output portions of both amplifiers 16 and 17 are commonly connected to the output end of the pressure transmitter via capacitors 18 and 19, respectively, and constitute voltage synthesis means for synthesizing the detected voltages detected by both voltage detection means. are doing.
次に、以上のように構成した半導体式圧力伝送
器の作用を説明する。先ず、半導体感圧素子のピ
エゾ抵抗を形成するＮ型基板に印加する逆バイア
ス電圧Ａをブリツジ回路１１の給電端子○イ，○ロに
印加する電圧Ｂより高い値に設定する。この状態
でパルス発振部１０より測定のサンプリング周期
を定めるパルスを出力する。このパルスに基づい
て電圧調整部１２より所定電圧Ｂがインバータ回
路１３を通してブリツジ回路１１の給電端子○イ，
○ロに交互に印加する。 Next, the operation of the semiconductor pressure transmitter configured as above will be explained. First, the reverse bias voltage A applied to the N-type substrate forming the piezoresistance of the semiconductor pressure-sensitive element is set to a value higher than the voltage B applied to the power supply terminals ○a and ○b of the bridge circuit 11. In this state, the pulse oscillator 10 outputs a pulse that determines the sampling period for measurement. Based on this pulse, a predetermined voltage B is applied from the voltage regulator 12 to the power supply terminals of the bridge circuit 11 through the inverter circuit 13.
Apply alternately to ○ and b.
このとき、ピエゾ抵抗である抵抗Ｒ１，Ｒ２を
拡散形成する基板に逆バイアス電圧Ａが印加され
ており、従つて、ブリツジ回路１１の給電端子
○イ，○ロに電圧Ｂが交互に加わつて変化したとき空
乏層１４，１５による抵抗Ｒ１，Ｒ２の抵抗値変
化の度合は同等になる。例えばブリツジ回路１１
の給電端子○イに10V、給電端子○ロに0Vを印加した
時、出力端子○ハでは抵抗Ｒ１＝Ｒ２であるので
5Vとなり、空乏層１４には7.5V、空乏層１５に
は2.5Vの電圧がかかる。逆に給電端子○イに0V、
給電端子○ロに10Vを印加した時、空乏層１４，１
５にはそれぞれ2.5V、7.5Vの電圧がかかる。従
つて、１周期について考えれば、抵抗Ｒ１，Ｒ２
に対する空乏層１４，１５の影響は同等である。 At this time, a reverse bias voltage A is applied to the substrate on which the resistors R1 and R2, which are piezoresistors, are diffused. When this happens, the degree of change in resistance value of the resistors R1 and R2 due to the depletion layers 14 and 15 becomes equal. For example, bridge circuit 11
When applying 10V to the power supply terminal ○A and 0V to the power supply terminal ○B, the resistance R1 = R2 at the output terminal ○C.
5V, a voltage of 7.5V is applied to the depletion layer 14, and a voltage of 2.5V is applied to the depletion layer 15. Conversely, 0V to the power supply terminal ○a,
When 10V is applied to the power supply terminal ○○, the depletion layer 14,1
Voltages of 2.5V and 7.5V are applied to 5, respectively. Therefore, considering one cycle, the resistances R1 and R2
The effects of the depletion layers 14 and 15 on the depletion layers 14 and 15 are equivalent.
ところで、ブリツジ回路１１の給電端子○イ側に
高い方の電圧が加わつた時の抵抗Ｒ１をＲ１ａ、
Ｒ２をＲ２ａ、給電端子○ロ側に高い方の電圧が加
わつた時の抵抗Ｒ１をＲ1b、Ｒ２をＲ2bとする
と、出力端子○ハを基準にして端子○イ−○ハ間、○ロ
−
○ハ間の電圧は、
端子○イ側が高い電圧の時
Ｖa〓＝Ｒ１ａ／Ｒ１ａ＋Ｒ２ａ Ｖa〓＝−Ｒ２ａ／Ｒ
１ａ＋Ｒ２ａ
端子○ロ側が高い電圧の時
Ｖb〓＝−Ｒ１ｂ／Ｒ１ｂ＋Ｒ２ｂ Ｖb〓＝Ｒ２ｂ／Ｒ
１ｂ＋Ｒ２ｂ
となる。そこで、このようにして得た電圧を演算
増幅器１６，１７に供給すると、同増幅器１６，
１７の出力は定常状態では変化しないが、給電端
子○イ，○ロの印加電圧が例えば○イが○ロに対して正
の
状態から負の状態に切換わるとき、コンデンサ１
８の出力電圧Ｖs〓は、
Ｖs〓＝Ｖa〓−Ｖb〓
となり、またコンデンサ１９の出力電圧Ｖs〓
は、
Ｖs〓＝Ｖa〓−Ｖb〓
となる。そこで、これらの電圧を合成すると、
Ｖs＝Ｖs〓＋Ｖs〓
となり、さらに、上記電圧Ｖs〓，Ｖs〓を展開し
た場合、
Ｖs＝２（Ｒ１ａ・Ｒ１ｂ−Ｒ２ａ・Ｒ２ｂ）／（Ｒ１
ａ＋Ｒ２ａ）（Ｒ１ｂ＋Ｒ２ｂ）
となる。従つて、上式より明らかなように抵抗Ｒ
１，Ｒ２に対しａ，ｂを入れかえても出力電圧Ｖ
sは全く同じ値となつて空乏層１４，１５の影響
を受けないことになる。 By the way, the resistance R1 when a higher voltage is applied to the power supply terminal ○a side of the bridge circuit 11 is R1a,
If R2 is R2a, resistance R1 is R 1b and R2 is R 2b when the higher voltage is applied to the power supply terminal ○Ro side, then between terminals ○E and ○C and ○R with output terminal ○C as a reference. −
The voltage between ○C is as follows: When terminal ○A side has a high voltage, V a 〓=R1 a /R1 a +R2 a V a 〓=-R2 a /R
1 a +R2 When a terminal ○○ side has high voltage V b 〓=-R1 b /R1 b +R2 b V b 〓=R2 b /R
1 b +R2 b . Therefore, when the voltage obtained in this way is supplied to the operational amplifiers 16 and 17, the amplifiers 16 and 17
The output of capacitor 17 does not change in a steady state, but when the voltage applied to power supply terminals ○a and ○b changes from a positive state to a negative state with respect to ○b, for example, the output of capacitor 1
The output voltage V s 〓 of the capacitor 19 becomes V s 〓=V a 〓−V b 〓, and the output voltage V s 〓 of the capacitor 19
becomes V s 〓=V a 〓−V b 〓. Therefore, when these voltages are combined, V s = V s 〓 + V s 〓, and further, when the above voltages V s 〓 and V s 〓 are expanded, V s = 2 (R1 a・R1 b −R2 a・R2 b )/(R1
a +R2 a )(R1 b +R2 b ). Therefore, as is clear from the above formula, the resistance R
Even if a and b are replaced with respect to 1 and R2, the output voltage V
s has exactly the same value and is not affected by the depletion layers 14 and 15.
一般に抵抗Ｒ１，Ｒ２は感圧による変化と空乏
層１４，１５による変化をもつが、図のような構
成にし例えば感圧０に対しＶs＝０となるように
抵抗Ｒ１，Ｒ２間に調整抵抗（例えば可変抵抗）
を入れておけば、電圧調整部１２からの印加電圧
がどのように変つても出力電圧Ｖsは空乏層１
４，１５の影響を受けるようなことはない。つま
り、従来のようにＰ−Ｎ接合部の空乏層の変化に
よつて抵抗Ｒ１，Ｒ２の抵抗値が変化しこれが真
の測定値と無関係に変化することを防止すること
ができる。 Generally, the resistors R1 and R2 have a change due to pressure sensitivity and a change due to the depletion layers 14 and 15, but if the configuration is as shown in the figure, for example, an adjustment resistor is placed between the resistors R1 and R2 so that V s = 0 when the pressure sensitivity is 0. (e.g. variable resistance)
If the output voltage V s is set in the depletion layer 1 no matter how the applied voltage from the voltage adjustment section 12 changes,
4, 15 will not be affected. In other words, it is possible to prevent the resistance values of the resistors R1 and R2 from changing due to changes in the depletion layer of the PN junction, which are independent of the true measured values, as in the conventional case.
なお、上記実施例ではブリツジ回路１１の給電
端子○イ，○ロに対し正電圧を交互に加える説明をし
たが、給電端子○イ，○ロに正電圧と負電圧を印加す
る構成であつても同様の機能を行なうものであ
る。 In addition, in the above embodiment, the description was given of applying a positive voltage alternately to the power supply terminals ○A and ○B of the bridge circuit 11, but the configuration is such that a positive voltage and a negative voltage are applied to the power supply terminals ○A and ○B. also performs the same function.
以上詳述したように本発明によれば、半導体感
圧素子を有するブリツジ回路の給電端子に交互に
所定電圧を供給するとともに感圧素子の両抵抗の
それぞれ両端間に現われる電圧を合成して出力す
るようにしたので、感圧素子のＰ−Ｎ接合部の空
乏層に変化が生じ前記素子の両抵抗値が変化して
も出力電圧の合成によつて平均化されるので結果
として空乏層の影響を除去することができる。従
つてＰ−Ｎ接合部の空乏層に変化があつても圧力
変化のみ正確に測定できる。 As described in detail above, according to the present invention, a predetermined voltage is alternately supplied to the power supply terminal of a bridge circuit having a semiconductor pressure-sensitive element, and the voltages appearing between both ends of both resistors of the pressure-sensitive element are combined and output. As a result, even if the depletion layer at the P-N junction of the pressure sensitive element changes and the resistance values of both elements change, it is averaged by combining the output voltages, and as a result, the depletion layer changes. effects can be removed. Therefore, even if there is a change in the depletion layer at the PN junction, only the pressure change can be accurately measured.
図は本発明に係る半導体式圧力伝送器の一実施
例を示す構成図である。
１０……パルス発振部、１１……ブリツジ回
路、１２……電圧調整部、１３……インバータ回
路、Ｒ１〜Ｒ４……抵抗（Ｒ１，Ｒ２は拡散抵
抗）、１４，１５……空乏層、１６，１７……演
算増幅器、１８，１９……コンデンサ。
The figure is a configuration diagram showing an embodiment of a semiconductor pressure transmitter according to the present invention. 10... Pulse oscillation section, 11... Bridge circuit, 12... Voltage adjustment section, 13... Inverter circuit, R1 to R4... Resistance (R1, R2 are diffusion resistance), 14, 15... Depletion layer, 16 , 17... operational amplifier, 18, 19... capacitor.
Claims (1)
の拡散抵抗を設け、この拡散抵抗を形成する基板
に逆バイアス電圧を加えてなる半導体式圧力伝送
器において、前記ブリツジ回路の給電端子間に所
定の電圧を交互に供給する電圧供給手段と、前記
ブリツジ回路の一方給電端子と出力端子間に接続
され、前記一方の拡散抵抗の両端電圧を検出する
第１の電圧検出手段と、前記ブリツジ回路の他方
給電端子と前記出力端子間に接続され、前記他方
の拡散抵抗の両端電圧を検出する第２の電圧検出
手段と、これら両電圧検出手段の出力端を共通接
続して検出電圧を合成する電圧合成手段とを備
え、この電圧合成信号を圧力測定信号とすること
を特徴とする半導体式圧力伝送器。1. In a semiconductor pressure transmitter in which diffused resistors of diffused semiconductor pressure-sensitive elements are provided on two sides of a bridge circuit, and a reverse bias voltage is applied to the substrate forming the diffused resistors, a predetermined voltage is applied between the power supply terminals of the bridge circuit. voltage supply means for alternately supplying a voltage of 1 to 1, a first voltage detection means connected between one power supply terminal and an output terminal of the bridge circuit to detect the voltage across the one diffused resistor; a second voltage detection means that is connected between the other power supply terminal and the output terminal and detects the voltage across the other diffused resistor; and a voltage that combines the detected voltage by commonly connecting the output ends of these voltage detection means. What is claimed is: 1. A semiconductor pressure transmitter, comprising: combining means, and uses the voltage combined signal as a pressure measurement signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11032878A JPS5537905A (en) | 1978-09-08 | 1978-09-08 | Semiconductor type pressure transmission device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11032878A JPS5537905A (en) | 1978-09-08 | 1978-09-08 | Semiconductor type pressure transmission device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5537905A JPS5537905A (en) | 1980-03-17 |
| JPS6118968B2 true JPS6118968B2 (en) | 1986-05-15 |
Family
ID=14532941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11032878A Granted JPS5537905A (en) | 1978-09-08 | 1978-09-08 | Semiconductor type pressure transmission device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5537905A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06144161A (en) * | 1992-11-04 | 1994-05-24 | Kunishige Kogyo Kk | Wiper device |
-
1978
- 1978-09-08 JP JP11032878A patent/JPS5537905A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06144161A (en) * | 1992-11-04 | 1994-05-24 | Kunishige Kogyo Kk | Wiper device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5537905A (en) | 1980-03-17 |
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