JPS61187422U - - Google Patents
Info
- Publication number
- JPS61187422U JPS61187422U JP7116085U JP7116085U JPS61187422U JP S61187422 U JPS61187422 U JP S61187422U JP 7116085 U JP7116085 U JP 7116085U JP 7116085 U JP7116085 U JP 7116085U JP S61187422 U JPS61187422 U JP S61187422U
- Authority
- JP
- Japan
- Prior art keywords
- signal input
- control signal
- output
- test equipment
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Testing Or Calibration Of Command Recording Devices (AREA)
Description
第１図は本考案の一実施例を示す断面図、第２
図は試験装置との接続を示すブロツク図である。
１……電力検出回路、２……周波数変換回路、
３……分周回路、４……カウンタ、５……制御信
号入力回路、６……出力制御回路、７……出力回
路、９……試験装置、１０……配線、ｔ１……制
御信号入力端子、ｔ２……出力端子、Ｍ１〜Ｍｎ
……被試験計器、ｆ１〜ｆｎ……試験用パルス信
号。
Fig. 1 is a sectional view showing one embodiment of the present invention;
The figure is a block diagram showing connections with test equipment. 1... Power detection circuit, 2... Frequency conversion circuit,
3... Frequency division circuit, 4... Counter, 5... Control signal input circuit, 6... Output control circuit, 7... Output circuit, 9... Test equipment, 10... Wiring, t1 ... Control signal Input terminal, t 2 ... Output terminal, M 1 to M n
...Meter under test, f1 to fn ...Test pulse signal.
Claims (1)
を試験装置に対して出力する出力回路を備えた電
子式積算計器において、試験装置に接続される制
御信号入力端子と、試験装置から制御信号入力端
子に入力する制御信号により前記試験用パルス信
号の出力をオンオフ制御する出力制御回路とを設
けたことを特徴とする電子式積算計器。 In an electronic integrating meter equipped with an output circuit that outputs a test pulse signal with a frequency proportional to the measured quantity to the test equipment, there is a control signal input terminal connected to the test equipment and a control signal input terminal from the test equipment. and an output control circuit that controls on/off the output of the test pulse signal according to a control signal input to the electronic integrating meter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7116085U JPS61187422U (en) | 1985-05-14 | 1985-05-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7116085U JPS61187422U (en) | 1985-05-14 | 1985-05-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61187422U true JPS61187422U (en) | 1986-11-21 |
Family
ID=30608399
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7116085U Pending JPS61187422U (en) | 1985-05-14 | 1985-05-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61187422U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5580014A (en) * | 1978-12-13 | 1980-06-16 | Osaki Denki Kogyo Kk | Electronic integrating meter inspecting device |
-
1985
- 1985-05-14 JP JP7116085U patent/JPS61187422U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5580014A (en) * | 1978-12-13 | 1980-06-16 | Osaki Denki Kogyo Kk | Electronic integrating meter inspecting device |
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