JPS596776U - Digital integrated power meter - Google Patents

Digital integrated power meter

Info

Publication number
JPS596776U
JPS596776U JP10149482U JP10149482U JPS596776U JP S596776 U JPS596776 U JP S596776U JP 10149482 U JP10149482 U JP 10149482U JP 10149482 U JP10149482 U JP 10149482U JP S596776 U JPS596776 U JP S596776U
Authority
JP
Japan
Prior art keywords
power meter
integrated power
digital integrated
digital
rate multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10149482U
Other languages
Japanese (ja)
Inventor
土井　健一
Original Assignee
渡辺電機工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 渡辺電機工業株式会社 filed Critical 渡辺電機工業株式会社
Priority to JP10149482U priority Critical patent/JPS596776U/en
Publication of JPS596776U publication Critical patent/JPS596776U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案の実施例のブロック図、第２図はこの
考案の他の実施例のブロック図、第３図は電圧（又は電
流）１周波数変換器を用いた積算電力計のブロック図で
ある。 １・・・電力検出回路、２・・・アナログ・デジタル変
換器、３・・・ラッチ回路、４・・・レートマルチプラ
イヤ、５・・・デジタル表示器、６・・・基準周波数発
振器、７・・・分周器、８・・・積算カウンター、９・
・・カウンター回路。Fig. 1 is a block diagram of an embodiment of this invention, Fig. 2 is a block diagram of another embodiment of this invention, and Fig. 3 is a block diagram of an integrating wattmeter using a voltage (or current) one-frequency converter. It is. DESCRIPTION OF SYMBOLS 1... Power detection circuit, 2... Analog-digital converter, 3... Latch circuit, 4... Rate multiplier, 5... Digital display, 6... Reference frequency oscillator, 7 ... Frequency divider, 8... Integration counter, 9.
...Counter circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ・デジタル変換器のアナログ入力側に、電圧お
よび電流信号より電力を検出する回路を設け、デジタル
出力側にレートマルチプライヤを設けると共に、前記レ
ートマルチプライヤの出力をカウンター回路に接続した
ことを特徴とするデジタル積算電力計。A circuit for detecting power from voltage and current signals is provided on the analog input side of the analog-to-digital converter, a rate multiplier is provided on the digital output side, and the output of the rate multiplier is connected to a counter circuit. A digital integrated power meter.
JP10149482U 1982-07-05 1982-07-05 Digital integrated power meter Pending JPS596776U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10149482U JPS596776U (en) 1982-07-05 1982-07-05 Digital integrated power meter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10149482U JPS596776U (en) 1982-07-05 1982-07-05 Digital integrated power meter

Publications (1)

Publication Number Publication Date
JPS596776U true JPS596776U (en) 1984-01-17

Family

ID=30239645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10149482U Pending JPS596776U (en) 1982-07-05 1982-07-05 Digital integrated power meter

Country Status (1)

Country Link
JP (1) JPS596776U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5189776A (en) * 1975-02-04 1976-08-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5189776A (en) * 1975-02-04 1976-08-06

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