JPS61186192U - - Google Patents
Info
- Publication number
- JPS61186192U JPS61186192U JP6919785U JP6919785U JPS61186192U JP S61186192 U JPS61186192 U JP S61186192U JP 6919785 U JP6919785 U JP 6919785U JP 6919785 U JP6919785 U JP 6919785U JP S61186192 U JPS61186192 U JP S61186192U
- Authority
- JP
- Japan
- Prior art keywords
- contacts
- contact members
- pitch
- lead
- lead pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims description 4
- 238000003780 insertion Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Connecting Device With Holders (AREA)
Description
第１図は本考案の実施例を示す外観図、第２図
はＩＣを実装した状態を示す断面図、第３図、第
４図は接触部材の断面図、第５図は絶縁基板の断
面図である。
１…接触子、２…接触部材、３…リードピン挿
着孔、４…絶縁基板、５…押え蓋、６…ＩＣ、７
…ＩＣ挿着口、８…接触子リードピン、９…挿着
孔内の接触子、１０…リードピン、１１…絶縁材
。
Fig. 1 is an external view showing an embodiment of the present invention, Fig. 2 is a sectional view showing the state in which an IC is mounted, Figs. 3 and 4 are sectional views of the contact member, and Fig. 5 is a sectional view of the insulating substrate. It is a diagram. DESCRIPTION OF SYMBOLS 1... Contactor, 2... Contact member, 3... Lead pin insertion hole, 4... Insulating board, 5... Holder lid, 6... IC, 7
...IC insertion slot, 8...Contact lead pin, 9...Contact in insertion hole, 10...Lead pin, 11...Insulating material.
Claims (1)
、ＩＣパツケージの外形に応じて組合せて用いる
複数個の接触部材と、接触部材の接触子のピツチ
に合せてリードピン挿着孔を格子状に配列した絶
縁基板と、挿着したＩＣを上面から固定する押え
蓋とを有することを特徴とするＩＣソケツト。 A plurality of contact members in which contacts are buried according to the lead pitch of the IC and used in combination according to the external shape of the IC package, and an insulator in which lead pin insertion holes are arranged in a grid pattern according to the pitch of the contacts of the contact members. An IC socket characterized by having a substrate and a holding cover for fixing an inserted IC from above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6919785U JPS61186192U (en) | 1985-05-10 | 1985-05-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6919785U JPS61186192U (en) | 1985-05-10 | 1985-05-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61186192U true JPS61186192U (en) | 1986-11-20 |
Family
ID=30604642
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6919785U Pending JPS61186192U (en) | 1985-05-10 | 1985-05-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61186192U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11185911A (en) * | 1997-12-22 | 1999-07-09 | Yokowo Co Ltd | Socket for measuring ic package |
-
1985
- 1985-05-10 JP JP6919785U patent/JPS61186192U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11185911A (en) * | 1997-12-22 | 1999-07-09 | Yokowo Co Ltd | Socket for measuring ic package |