JPS61184854A - Resin sealing type semiconductor device - Google Patents

Abstract

PURPOSE:To limit the yield of cracks extremely, by providing stress avoiding cut parts at the central parts of the sides of a semiconductor-chip mounting part so that the pressure of water vapor due to high temperature, which is applied to a printed wiring board and the like at the time of mounting, is not concentrated on a specified part but dispersed. CONSTITUTION:Cut parts 14 are provided at the parts of the outer edge parts (peripheral parts) of a chip mounting part 13a in a lead frame 13. The actual size of the chip mounting part 13a is 6mm in longitudinal direction and 7mm in lateral direction, and a rectangle is formed. The cut parts 14 have a rectangular form, which has sizes of 1.5mm in longitudinal direction and 2mm in lateral direction. The cut parts 14 are provided at the approximately central parts of the four sides. As a result, the selected parts of the chip mounting part, i.e., the parts where stress is concentrated, are removed by the cut parts. Therefore, the stress is dispersed. Even if moisture is absorbed by a molding resin, the yield of cracks is limited when the amount of moisture absorption is less than the specified amount.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a resin-encapsulated semiconductor device, and more specifically, a semiconductor chip is mounted on the element mounting portion of a resin lead frame, and the surrounding area is surrounded by a molded resin. The present invention relates to a sealed semiconductor device.

(Prior Art) As electronic devices are mounted at high density, the package shapes of semiconductor devices mounted on printed wiring boards are small and thin flat plastic cages, small outline packages, cages, or flats.

It is also called a to dilag package. Many of them are suitable for so-called surface mounting. Furthermore, surface mounting by soldering on printed wiring boards is also transitioning from a method of mounting them individually to a method of mounting multiple pieces at the same time, but new problems associated with simultaneous heating methods such as infrared heating are coming into focus. It's here. That is, as the size of semiconductor chips increases with the increase in functionality, the thickness of the package does not increase so much, which causes cracks to appear in the package. The causes of this cracking, the locations where many cracks occur, and the prior art as countermeasures are available, for example, in the Proceedings of the National Conference of the Institute of Electronics and Communication Engineers in 1983, pages 1-50, and in May 1988, 14th It is described on pages 303 to 306 of the Japan Society of Science and Technology Reliability and Maintainability Symposium Report.

In other words, in the former case, is the crack caused by semiconductor A being stored? It is assumed that the moisture adsorbed on the package is due to a sudden increase in water vapor pressure caused by infrared heating and other relatively high temperatures during the bonding process, and as a countermeasure, the semiconductor devices that have been completed before being put into production are heated to a temperature that does not cause cracks. It is stated that the product is dried and dehydrated.

On the other hand, in the case of the latter, the cause of cracks is: - When analyzing the gas generated from the entire GUCKESO, moisture accounts for more than 95%, so it occurs in the gap between the tab (element mounting part) and the resin interface just before the package crack occurs. High-pressure water vapor is used, and as a countermeasure, it is stated that a white metal reflector plate should be provided on the package surface facing the infrared heat source to prevent the temperature of the finished device from increasing.

(Problem to be solved by the invention) However, the measures described in the former document have time constraints for drying and dehydrating immediately before mounting, and if drying and dehydrating are not performed before actual equipment. After drying and dehydration, the equipment must be stored in a re-absorption prevention container. In addition, since the drying temperature is low, the processing time becomes long. On the other hand, in the countermeasure described in the latter document, the heating mounting method is limited to the infrared heating method, and is not compatible with the penocoufys method and the hot air method. In other words, these methods eliminate
This is because the package is exposed to high temperatures due to the heat that circulates to the back of the package.

Now, as shown in the two prior art documents mentioned above, cracks occur at the periphery of the chip mounting portion due to the expansion of moisture absorbed by the cage. More precisely, the locations where cracks occur will be explained with reference to FIGS. 3 and 4. Figure 3 is a back view of a conventional resin-sealed semiconductor device with external leads omitted;
Although this is a sectional view taken along the line X--X in the figure, it should be noted that only a portion of the external leads are depicted in this figure. It can be understood from these figures that the crack 2 that has occurred inside the insulating resin 1 such as epoxy resin extends to the back surface of the nozzle cage. In particular, in FIG. 4, cracks extending to the surface of the package are shown by solid lines. Moreover, this crack 2 is caused by a blister 4 that occurs between the resin 1a located on the back side of the package and the chip mounting portion 3a of the lead frame 3 due to water vapor pressure, and the chip mounting portion 3a forming a rectangular shape. Although it does not appear on the short side t1, it is often seen in the center of the long side t2. When this crack 2 is observed more closely, its origin is found at the lower end A of the side surface of the chip mounting portion 3a. It will be understood from the following explanation that the cracks 2 often occur at the center of the sides, particularly at the center of the long side t2. That is, the chip mounting portion having short side Z1+long side t2 and thickness t is fixed at its periphery by molded resin. At this time, if the flat surface of the chip mounting part receives a uniformly distributed load, that is, water vapor pressure (for example, at a temperature of 240'C, 33
atmospheric pressure) The bending moment is concentrated at the center of the side, and the bending moment is concentrated at the center of the side,
This is because it is maximum at the center of 2.

Moreover, the reason why the crack 2 appears toward the back side of the chip mounting portion 3a is considered to be because the thickness of the package is thinner than that on the mounting side of the semiconductor chip f5.

(Means for Solving the Problems) The present invention provides a resin-sealed semiconductor device in which a notch is provided approximately at the center of a surface perpendicular to the thickness direction of a semiconductor chip mounting portion. .

(Function) A characteristic effect of the present invention is that the selected portion of the chip mounting portion, that is, the portion where stress is concentrated, is removed by the notch, and as a result, stress is dispersed, even if the molded resin has absorbed moisture. If the amount of moisture absorption is less than a predetermined amount, it will work to limit the occurrence of cracks and cracks.

(Embodiment) A preferred embodiment of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a perspective view of a resin-sealed semiconductor device showing a first embodiment of the present invention, with a portion cut away. Now, the embodiment device 10 includes a semiconductor chip 12 surrounded by an insulating resin 11 for molding such as epoxy resin, and this semiconductor chip 12 is connected to a lead frame 1.
A selected one of the plurality of external lead leads 13b placed on the chip mounting portion 13a of No. 3 and led out from the insulating resin 11 forming the package, and a thin wire (not shown in the drawings, for example, a gold wire) in the resin 11. It is connected. The configuration up to this point is no different from a conventional resin-sealed semiconductor device. However, in this invention device 10, the lead frame 13
Note that the chip mounting portion 13a has a notch in a selected portion. That is, the lead frame 13 has a notch 14 in a part of the outer edge (periphery) of the chip mounting portion 13a. Since the position and shape of this notch 14 may be difficult to understand in FIG. 1, it is shown enlarged in FIG. 2. That is, FIG. 2 is an enlarged plan view of the main part of the present invention, showing the semiconductor chip mounting portion 13a1 of the lead frame 13.
Only a part of a support piece 13c called an island support and a notch 14 are shown. The actual size of the chip mounting portion 13m in this embodiment is a rectangle with a height of 6 mm and a width of 7 + maO, and each side has a notch 14 on all four sides, which is a rectangular notch with a length of 1.5 mm and a width of 2 + + + m at the center. . In this example, the area reduction rate of the chip mounting part 13a is approximately 30%, but the table below shows the area reduction rate based on the chip mounting part 13m, which has the same dimensions, that is, a rectangle with 6 squares by 7 squares. The experimental results of the cracking and scratching resistance of 10 samples each are shown below, with the notch shape set as the A parameter. The surface metal sample was coated with the same epoxy resin and then heated at 85℃ and 85% R-
These are the observation results after being left in a high temperature and high humidity atmosphere of H for 72 hours to allow the mother and cage to sufficiently absorb moisture, and then immersed in a 260° C. solder bath for 40 seconds.

As far as the experimental results are concerned, it is clear that the higher the area reduction rate, the better the results. Furthermore, there seems to be no difference in the shape of the notch whether it is rectangular or semicircular.

Although the number of samples was small (10 each), it was shown that the effect was large. From these results, it appears that an area reduction rate of 5% or more is quite effective, and preferably a factor of 20 or more. Also, it seems like you don't have to be too careful about the shape of the notch.

(Effects of the Invention) As described above, the resin-sealed semiconductor device of the present invention has a notch for stress avoidance at the center of the side of the semiconductor chip mounting area, so that it can withstand high temperatures applied during mounting on a printed wiring board, etc. Since the moisture vapor pressure is dispersed rather than concentrated in a specific area, the occurrence of cracks can be extremely limited.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a resin-sealed semiconductor device according to this embodiment, with a portion cut away. FIG. 2 is an enlarged plan view of the main part of FIG. 1. FIG. 3 is a back view of a conventional resin-sealed semiconductor device, and FIG. 4 is a cross-sectional view taken along the line X--X in FIG. DESCRIPTION OF SYMBOLS 10... Resin-sealed semiconductor device, 1... Insulating resin, 12... Semiconductor chip, 13... Lead frame, 13a... Chip mounting part, 13b... External lead-out lead, 13a... Support piece, 14... Notch.

Claims (2)

[Claims] (1) A lead frame having a chip mounting portion, a semiconductor chip placed on the mounting portion, a conductive thin wire connecting an electrode of the chip and an external lead of the lead frame, the semiconductor chip and the conductive wire. In a resin-sealed semiconductor device including an insulating resin that surrounds thin wires and constitutes a package, the chip mounting portion is cut approximately at the center of a selected surface perpendicular to the thickness direction of the mounting portion. A resin-sealed semiconductor device characterized by having a chip. (2) The resin-sealed semiconductor device according to claim 1, wherein the notch is provided on all surfaces perpendicular to the thickness direction of the chip mounting portion.