JPS61183934A - Manufacture of network electronic component - Google Patents

Manufacture of network electronic component

Info

Publication number
JPS61183934A
JPS61183934A JP2277385A JP2277385A JPS61183934A JP S61183934 A JPS61183934 A JP S61183934A JP 2277385 A JP2277385 A JP 2277385A JP 2277385 A JP2277385 A JP 2277385A JP S61183934 A JPS61183934 A JP S61183934A
Authority
JP
Japan
Prior art keywords
substrate
lead terminals
mold
lead
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2277385A
Other languages
Japanese (ja)
Inventor
Katsumi Takayanagi
高柳 克己
Satsuo Endou
遠藤 察夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP2277385A priority Critical patent/JPS61183934A/en
Publication of JPS61183934A publication Critical patent/JPS61183934A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To contrive to improve the mass productivity by preventing the movement of a substrate in the cavity during extrusion molding, by a method wherein a substrate is provided with supporting plats besides lead terminals, and the plates are held in a metal mold by utilizing these; after cooling and solidification of melt resin, the supporting plates are cut off from the exterior. CONSTITUTION:On a ceramic substrate 1, resistance films 2, electrodes 3, 4, and dummy terminals 8 are printed at required intervals. Resistance films are set by trimming each resistance film 2; then, a plurality of lead terminals 5 molded integrally to a metallic lead frame 6 are connected to the electrodes 3, 4 with solder, and each projection of a supporting plate 9 having the same shape as that of the lead frame 6 is connected to a dummy terminal 8 with solder. Setting these in a metal molder, a melt resin is extruded and cast into the cavity. At this time, the lead frame 6 and the supporting plate 9 including the lead terminals 5 are pressed and held between the moving mold and the fixed mold of the metal molder; therefore, the movement of the substrate 1 in the cavity under the extrusion pressure of resin does not occur. After an exterior 7 is molded by cooling and solidification, unnecessary parts are cut off, thus obtaining an SiP type network resistor.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、基板上に抵抗素子やコンデンサ素子などの複
数の電子素子を集積、複合化して設け、これらを合tG
&脂製の外装体によって絶縁封止してなるネットワーク
電子部品の製造方法に係り、特に、各電子素子の両電極
と導通する複数体のリード端子が外装体から一列に突出
するSIP形(Single −in −1ine P
ackage ”)と呼ばれるネットワーク電子部品の
製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention provides a method for integrating and compounding a plurality of electronic elements such as resistive elements and capacitor elements on a substrate, and combining them into a tG.
It relates to a method for manufacturing a network electronic component that is insulated and sealed with an exterior body made of & fat, and particularly relates to a method for manufacturing a network electronic component that is insulated and sealed with an exterior body made of oil, and particularly for the SIP type (Single -in -1ine P
The present invention relates to a method for manufacturing network electronic components called "ackage").

〔発明の背景〕[Background of the invention]

ネットワーク電子部品は、近時における電子回路のIC
化、あるいは電子機器の小型化と共に、そのm要が急増
している。このため、かかるネットワーク電子部品を高
品質で量産するための手法が各方面で研究されている。
Network electronic components are ICs of recent electronic circuits.
The need for electronic devices is increasing rapidly as electronic devices become smaller. For this reason, methods for mass-producing such network electronic components with high quality are being researched in various fields.

第4図は、従来より行われているネットワーク電子部品
の製造方法の一例を示す工程図であって、1は基板、2
は抵抗膜、3は共atX極、4は電極、5はリード端子
、6はリードフレーム、7は外装体である。
FIG. 4 is a process diagram showing an example of a conventional method for manufacturing network electronic components, in which 1 is a board, 2
3 is a resistive film, 3 is an atX pole, 4 is an electrode, 5 is a lead terminal, 6 is a lead frame, and 7 is an exterior body.

まず、f144図(α)に示すように、セラミックス基
板l上に1つの共MJTIi極3と複数の電極4とを印
刷すると共に、両′rii極3.4を跨ぐように複数の
抵抗膜2を所定幅で印刷する。
First, as shown in FIG. to a specified width.

次に、各抵抗H早2にトリミングを施して抵抗値を設定
した後、同図(b’)に示すように、金属製のリードフ
レーム6に一体形咳された複数本のリード端子5を前記
両電極3.4VC半田接続し、これらを金型装置&(図
示せず)にセットして基板1の周囲に形成されるキャビ
ティ部(破線で示す)に溶役樹脂を射出・注入する。こ
の時、リード端子5を含むリードフレーム6は金型装置
の可動型と固定型(いずれも図示せず)とによって抑圧
保持され、キャビティbVc対する基板1の位置決め川
として作用する。
Next, after trimming each resistor H2 and setting the resistance value, as shown in FIG. Both electrodes are connected with 3.4 VC solder, and these are set in a mold device & (not shown), and a molten resin is injected into a cavity (indicated by a broken line) formed around the substrate 1. At this time, the lead frame 6 including the lead terminals 5 is pressed and held by a movable mold and a fixed mold (none of which are shown) of the mold apparatus, and acts as a positioning river for the substrate 1 with respect to the cavity bVc.

しかる後、上記浴融樹脂を金型装置内で冷却固化し、同
図(C)に示すように、合成樹脂製の外装体7を成形す
る。最後に、リードフレーム6をリード端子5との接続
部分で切り離し、同図(d)に示すように、外装体7の
下端に複数のリード端子5を一列に備えたSIP形ネッ
トワーク抵抗器を得ろ。
Thereafter, the bath-molten resin is cooled and solidified in a mold apparatus, and as shown in FIG. Finally, the lead frame 6 is cut off at the connection part with the lead terminals 5 to obtain a SIP type network resistor with a plurality of lead terminals 5 arranged in a row at the lower end of the exterior body 7, as shown in FIG. .

かかる従来例にあっては、金型を用いて封止用の外装体
7を射出成形することができ、一般に・射出成形法は加
工サイクルが短かく多数個取りが可能であるため、34
【生産に適している。
In such a conventional example, the sealing exterior body 7 can be injection molded using a mold, and generally the injection molding method has a short processing cycle and can produce a large number of pieces.
[Suitable for production.

しかしながら、基板1の片側に連結したリード端子5及
びリード7レーム6を用いて、基板lを金型内の所定位
置に抑圧保持するI#造であるため、溶融樹脂を射出し
た際に、当該樹脂の射出圧力によって基板1がキャビテ
ィ部内で移動し易く、その結果、第5図の側面図に示す
ように、基板1が外装体7内において偏倚してしまうと
いう不良が発生する。
However, since it is an I# construction in which the board 1 is pressed and held in a predetermined position in the mold using the lead terminal 5 and lead 7 frame 6 connected to one side of the board 1, when the molten resin is injected, the The substrate 1 tends to move within the cavity due to the injection pressure of the resin, and as a result, a defect occurs in which the substrate 1 is displaced within the exterior body 7, as shown in the side view of FIG.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記従来技術の欠点を除き、製品の歩
留りな向上して飯産に適したネットワーク電子部品の製
造方法を提供するにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing network electronic components that eliminates the drawbacks of the prior art, improves product yield, and is suitable for food production.

〔発明のa要〕[A essential point of the invention]

この目的を達成するために、本発明は、基板にリード端
子とは別に支持板を設け、これら支持板とリード端子と
を利用して、基板を金型内に堅固に保持できるようにし
、溶融樹脂の冷却固化後は、上記支持板を外装体から切
り離してSIP形のネットワーク電子部品を製造するよ
うにした点に特徴がある。
In order to achieve this objective, the present invention provides a support plate in addition to the lead terminals on the substrate, and utilizes these support plates and lead terminals to firmly hold the substrate in the mold. The present invention is characterized in that after the resin is cooled and solidified, the support plate is separated from the exterior body to manufacture a SIP type network electronic component.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を図面について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は、本発明によるネットワーク電子部品の製造方
法の一実施例を示す工程図であって、8はダミ一端子、
9は支持板であり、第4図に対応する部分には同一符号
を付けである。
FIG. 1 is a process diagram showing an embodiment of the method for manufacturing network electronic components according to the present invention, in which 8 is a dummy terminal;
9 is a support plate, and parts corresponding to those in FIG. 4 are given the same reference numerals.

まず、第1図(α)に示すように、セラミックス基vf
l上に、所定の間隔をおいて袢数の抵抗膜2とこれに接
続する両電極3.4、及び抵抗膜2と導通しない復チコ
のダミ一端子8とをそれぞれ印刷する。
First, as shown in FIG. 1 (α), the ceramic base vf
A number of resistive films 2, both electrodes 3.4 connected thereto, and double dummy terminals 8 which are not electrically connected to the resistive film 2 are printed on the resistive film 2 at predetermined intervals.

次に、各抵抗膜2にトリミングな園して抵抗値を設定し
た後、第1囚(b)に示すように、金属製のリードフレ
ーム6 vc一体形成された複数本のリード端子5を上
記両主働3,4に半田接続し、このリードフレーム6と
同一形状の支持鈑90各突部を上記ダミ一端子8に半田
接続する。しかる後、これらを図示せぬ金型装置内にセ
ットして基pilの周囲に形成されるキャビティ部(破
線で示す)に溶融樹脂を射出・注入する。この時、IJ
−ド端子5を含むリードフレーム6と支持板9とが金型
装置の可動型と固定型間に押圧保持されるため、基板1
は両側部分が金型装置内に支持されろことになり、樹脂
の射出圧力によって幇;板1がキャピテイ部内で移動す
るという不具合は発生しない。
Next, after trimming each resistive film 2 and setting the resistance value, as shown in the first frame (b), the plurality of lead terminals 5 integrally formed with the metal lead frame 6 VC are connected to the Both main parts 3 and 4 are connected by soldering, and each protrusion of a support plate 90 having the same shape as the lead frame 6 is soldered to the dummy terminal 8. Thereafter, these are set in a mold device (not shown), and molten resin is injected into a cavity (indicated by a broken line) formed around the base pile. At this time, I.J.
- Since the lead frame 6 including the lead terminal 5 and the support plate 9 are pressed and held between the movable mold and the fixed mold of the mold device, the board 1
Since both sides of the plate 1 are supported within the mold apparatus, the problem that the plate 1 moves within the cavity due to the injection pressure of the resin does not occur.

このようにして射出・注入さJ7−た溶融M ffWを
金型装置内で冷却固化し、第1図(e)に示すように、
リード端子5を含むリード71・−ムロと支持板9とを
互いに反対面に突出形成した外4〜体7をl1i12.
形する。
The molten MffW injected and injected in this way is cooled and solidified in the mold device, and as shown in FIG. 1(e),
The outer 4 to the body 7 in which the leads 71 including the lead terminals 5 and the support plate 9 are formed protruding from opposite surfaces are l1i12.
Shape.

最後に、第1図(d)に示すように、リードフレーム6
をリード端子5との接γ;’、二B’L分で切り頗丑し
、−力、支持板9を外装体7とのG G 部分で切り離
すことにより、外装体7の下端にリード郊1子5を一列
に備えたSIP形ネットワーク抵抗器を得ろ。
Finally, as shown in FIG. 1(d), the lead frame 6
By cutting the support plate 9 at the point where it connects with the lead terminal 5 by γ;', 2 B'L, and separating the support plate 9 at the G point where it connects to the outer case 7, a lead edge is attached to the lower end of the outer case 7. Obtain a SIP type network resistor with 1 resistor 5 in a row.

この一実施例にあっては、基板1に支持&!9を連結す
るという工]輸を加えるだけで、射出成形時の基板1の
移動を防止でき、先に説明した従来方法に比べて製品の
歩留りを向上することができる。
In this embodiment, the substrate 1 supports &! By simply adding the step of connecting the parts 9 to 9, movement of the substrate 1 during injection molding can be prevented, and the yield of the product can be improved compared to the conventional method described above.

また、支持板9を切断した後、外装体7にその切断端面
が露出するが、かかる切断@面は抵抗膜2と非接触であ
るため活電部とはならず、面常のSIP形ネットワーク
抵抗器と同様に取り扱うことができる。
Further, after cutting the support plate 9, the cut end face is exposed on the exterior body 7, but since the cut face is not in contact with the resistive film 2, it does not become a live part, and it is not a live part. It can be handled in the same way as a resistor.

第2図は、本発明によるネットワーク電子部品の製造方
法の他の実施例を示す工程図であって、10は基板、1
1は第1のフレーム、12は第2のフレーム、13.1
4は突出部、15はチップ状電子部品であり、第1図に
対応する部分には同一符号を付けである。
FIG. 2 is a process diagram showing another embodiment of the method for manufacturing network electronic components according to the present invention, in which 10 is a substrate;
1 is the first frame, 12 is the second frame, 13.1
4 is a protrusion, 15 is a chip-shaped electronic component, and parts corresponding to those in FIG. 1 are given the same reference numerals.

まず、予め準備されたフープ状の金属板を順次送り、所
定形状の基板10をプレス加工する。この基板10は、
第2図(α)に示すように、複数の突出部13を有する
第1の7レーム11と、同様に複数の突出部14を有す
る第2の7レーム12とによって構成され、互いに対向
する各突出部13.14は、左側の一対を除いて分断さ
れている。
First, hoop-shaped metal plates prepared in advance are sequentially fed, and a substrate 10 having a predetermined shape is pressed. This substrate 10 is
As shown in FIG. 2(α), the first seven frames 11 have a plurality of protrusions 13, and the second seven frames 12 have a plurality of protrusions 14. The protrusions 13,14 are segmented except for the left pair.

次に、第2図(b)に示すように、第1及び第2の7レ
ーム11.12の各突出部13.14間に、チップ抵抗
やチップコンデンサ等のチップ状電子部品15を載置、
固着し、これらを図示せぬ金型装置内に送った後、破線
で表わされるキャビティ部に溶融樹脂を射出・注入する
。この時、第1及び第2のフレーム11.12は可動型
と固定型間に押圧保持され、これにより、基板10の位
置決めがなされると共に、射出成形時の基板10の偏倚
が防止される。
Next, as shown in FIG. 2(b), a chip-shaped electronic component 15 such as a chip resistor or a chip capacitor is placed between each protrusion 13.14 of the first and second seven frames 11.12. ,
After fixing and sending these into a mold device (not shown), molten resin is injected into the cavity shown by the broken line. At this time, the first and second frames 11, 12 are pressed and held between the movable mold and the fixed mold, thereby positioning the substrate 10 and preventing deviation of the substrate 10 during injection molding.

次に、上記溶融樹脂を金型装置内で冷却固化し、第2図
(C)に示すように、両側に第1の7レーム11と第2
の7レーム12をそれぞれ備えた外装体7を成形する。
Next, the molten resin is cooled and solidified in a mold device, and as shown in FIG. 2(C), the first seven frames 11 and the second
An exterior body 7 each having seven frames 12 is molded.

最後に、第2図(d)[示すように、第1の7レーム1
1を突出部13の基端から切り離して複数の突出部13
を残し、一方、第2の7レーム12を外装体7との接続
部分で切り離し、これにより、外装体7の下端にリード
端子5を一列に備えたSIP形のチップネットワークヲ
得る。
Finally, as shown in Figure 2(d), the first 7 rams 1
1 from the proximal end of the protrusion 13 to form a plurality of protrusions 13.
On the other hand, the second seven frames 12 are separated at the connection portion with the outer case 7, thereby obtaining a SIP type chip network in which the lead terminals 5 are arranged in a row at the lower end of the outer case 7.

この一実施例にあっては、リード端子形成用のw41の
7レーム11と、基板10を金型装置内に支持するため
の第2の7レーム12とを、突出部13.14とともに
7−プ状金711から一体形成できろため、量産に適し
ている。
In this embodiment, the seven beams 11 of w41 for forming lead terminals and the second seven beams 12 for supporting the substrate 10 in the mold apparatus are placed together with the protruding portions 13.14 in the 7- Since it can be formed integrally from the metal plate 711, it is suitable for mass production.

第3図は、本発明によるネットワーク電子部品の製造方
法のさらに他の実施例を示す説明図であって、第2図(
b)に相当する工程のみを示し、その余の工程図は図示
省略しである。
FIG. 3 is an explanatory diagram showing still another embodiment of the method for manufacturing network electronic components according to the present invention, and FIG.
Only the process corresponding to b) is shown, and the remaining process diagrams are omitted.

この実施例は、上記第2崗の実施例において設けられて
いた第2のフレーム12を削除し、その代りに、左右両
側の突出部14に第1の7レーム11と平行に延びる支
持板16を設け、これら支持板16と第1の7レーム1
1とによって三方から基板10な金型装置内に保持する
ように構IJlil、シである。その他の構成や工程は
、上記第2の実施例と基本的に同じであり、第3図の破
線で示す部分に外装体7を射出成形した後、両支持板1
6は外装体7との接続部分で切り離されるっなお、上記
各実蝕例では、基板上に搭載される電子素子の一例とし
て抵抗とコンデンサについて説明したが、それ以外VC
ダイオード等の電子部品を使用することも可能である。
In this embodiment, the second frame 12 provided in the second frame embodiment is removed, and instead, support plates 16 are provided on the left and right protrusions 14 extending parallel to the first seven frames 11. are provided, and these support plates 16 and the first seven frames 1
1, the substrate 10 is held in a mold apparatus from three sides. The other configurations and processes are basically the same as those of the second embodiment, and after injection molding the exterior body 7 on the part shown by the broken line in FIG.
6 is separated at the connection part with the exterior body 7. In each of the above practical examples, resistors and capacitors were explained as examples of electronic elements mounted on the board, but other than VC
It is also possible to use electronic components such as diodes.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、創出成形時に、
リード端子と支持板との画部分によって基板な金型内に
保持できるため、溶融樹脂の射出圧力によって基板がキ
ャビティ内で移動するという不具合を防止でき、従来技
術に比べてjfi産性VC優れたネットワーク電子部品
のIk!b力法を提供できる。
As explained above, according to the present invention, during creation molding,
Since the substrate can be held in the mold by the image between the lead terminal and the support plate, it is possible to prevent the substrate from moving within the cavity due to the injection pressure of the molten resin, resulting in superior JFI productivity VC compared to conventional technology. Ik for network electronic components! b-force method can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(α)〜(d)は本発明の第1実兎例におけるネ
ットワーク電子部品の製造工程図、第2図(cL)〜(
d)は本発明の第2実施例におけるネットワーク電子部
品の製造工程図、第3図は本発明の第3実施例における
基板の平面図、第4図((X’)〜(d)は従来のネッ
トワーク電子部品の製造工程図、第5図は従来例の不具
合を説明するネットワーク電子部品の側面図である。 1.10・・・・・・基板、2・−・・・・抵抗膜(¥
子素子)、3・・・・・・共a電極、4・・・・・・電
極、5・・・・・・リード端子、6・・・・・・リード
フレーム、7・・・・・・外装体、8・・・・・・ダミ
一端子、9,16・・・・・・支持板、11・・・・・
・第1の7レーム、12・・・・・・第2のフレーム(
支持&)、13.14・・・・・・突出部、15・・・
・・・チップ状電子部品。 才1図 牙3図 I 、1−5図
Figures 1 (α) to (d) are manufacturing process diagrams of network electronic components in the first practical example of the present invention, and Figures 2 (cL) to (
d) is a manufacturing process diagram of the network electronic component in the second embodiment of the present invention, FIG. 3 is a plan view of the board in the third embodiment of the present invention, and FIG. FIG. 5 is a side view of the network electronic component illustrating the defects in the conventional example. 1.10...Substrate, 2...Resistive film ( ¥
element), 3... Common a electrode, 4... Electrode, 5... Lead terminal, 6... Lead frame, 7...・Exterior body, 8... Dummy terminal, 9, 16... Support plate, 11...
・First 7 frames, 12... Second frame (
Support &), 13.14... Protrusion, 15...
...Chip-shaped electronic components. Figure 1, Figure 3, Figures 1-5.

Claims (1)

【特許請求の範囲】[Claims]  基板上に複数の電子素子を設け、これらを射出成形に
よつて絶縁封止するようにしたネットワーク電子部品の
製造方法において、前記基板に前記各電子素子と導通す
るリード端子を一列に突出して設けると共に、前記基板
の該リード端子から離れた位置に支持板を突出して設け
、これらリード端子と支持板とを金型内に支持した状態
で溶融樹脂を前記基板の周囲のキャビティに射出・注入
し、その後に当該溶融樹脂を冷却固化して前記リード端
子と支持板とを備えた外装体を成形し、しかる後、前記
支持板を該外装体から切り離し、該外装体に前記リード
端子のみを突設するようにしたことを特徴とするネット
ワーク電子部品の製造方法。
In a method for manufacturing a network electronic component in which a plurality of electronic elements are provided on a substrate and these are insulated and sealed by injection molding, lead terminals that are electrically connected to each of the electronic elements are provided in a row protruding from the substrate. At the same time, a support plate is provided to protrude from the board at a position away from the lead terminals, and molten resin is injected into a cavity around the board while the lead terminals and the support plate are supported in a mold. Then, the molten resin is cooled and solidified to form an exterior body including the lead terminals and a support plate, and then the support plate is separated from the exterior body, and only the lead terminals are inserted into the exterior body. A method for manufacturing a network electronic component, characterized in that:
JP2277385A 1985-02-09 1985-02-09 Manufacture of network electronic component Pending JPS61183934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2277385A JPS61183934A (en) 1985-02-09 1985-02-09 Manufacture of network electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2277385A JPS61183934A (en) 1985-02-09 1985-02-09 Manufacture of network electronic component

Publications (1)

Publication Number Publication Date
JPS61183934A true JPS61183934A (en) 1986-08-16

Family

ID=12091983

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2277385A Pending JPS61183934A (en) 1985-02-09 1985-02-09 Manufacture of network electronic component

Country Status (1)

Country Link
JP (1) JPS61183934A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998008251A1 (en) * 1996-08-20 1998-02-26 Hitachi, Ltd. Semiconductor and method for manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998008251A1 (en) * 1996-08-20 1998-02-26 Hitachi, Ltd. Semiconductor and method for manufacturing the same
KR100342797B1 (en) * 1996-08-20 2002-07-04 가나이 쓰도무 Semiconductor and method for manufacturing the same

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