JPS61182226A - Semiconductor dry etching device - Google Patents
Semiconductor dry etching deviceInfo
- Publication number
- JPS61182226A JPS61182226A JP2327285A JP2327285A JPS61182226A JP S61182226 A JPS61182226 A JP S61182226A JP 2327285 A JP2327285 A JP 2327285A JP 2327285 A JP2327285 A JP 2327285A JP S61182226 A JPS61182226 A JP S61182226A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- upper electrode
- etched
- dry etching
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001312 dry etching Methods 0.000 title claims description 11
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000005530 etching Methods 0.000 claims description 10
- 238000007664 blowing Methods 0.000 claims 1
- 239000010409 thin film Substances 0.000 claims 1
- 239000007789 gas Substances 0.000 abstract description 25
- 239000012495 reaction gas Substances 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 description 13
- 239000003990 capacitor Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 2
- 210000004907 gland Anatomy 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体集積回路の製造過程において、微細
なエツチングを行なうための半導体ドライエツチング装
置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor dry etching apparatus for performing fine etching in the manufacturing process of semiconductor integrated circuits.
第１図は従来のドライエツチング装置を示す断面図であ
り、図において、１は平行平板上部電極、２は平行平板
下部電極、３はエツチングガスの導入口、４はガスの排
気口、５は反応室、６はウェハ、７は高周波電力印加装
置、８は容量器である。FIG. 1 is a sectional view showing a conventional dry etching apparatus. In the figure, 1 is a parallel plate upper electrode, 2 is a parallel plate lower electrode, 3 is an etching gas inlet, 4 is a gas exhaust port, and 5 is a gas exhaust port. A reaction chamber, 6 a wafer, 7 a high frequency power application device, and 8 a capacitor.
次に動作について説明する。Next, the operation will be explained.
まず、第３図のガス排気口４から真空ポンプによりチャ
ンバ反応室５を高真空にした後、ガス導入口３よりエツ
チングガスを吹き出させる。次に、高周波電力印加装置
７．容量器８により、平行平板上部電極１に高周波電力
を与える。First, the chamber reaction chamber 5 is brought to a high vacuum using a vacuum pump through the gas exhaust port 4 shown in FIG. 3, and then etching gas is blown out through the gas inlet port 3. Next, high frequency power application device 7. A capacitor 8 applies high frequency power to the parallel plate upper electrode 1 .
反応室５の中ではエツチングガスの分子と電子が衝突し
、ガスの分子はラジカルとイオンに解離する。そしてこ
れらがウェハ６の表面に衝突し、腺と反応し、膜がエツ
チングされる。In the reaction chamber 5, molecules of the etching gas collide with electrons, and the gas molecules dissociate into radicals and ions. These particles then collide with the surface of the wafer 6, react with the glands, and etch the film.
従来のドライエツチング装置は以上のように構成されて
いるので、ウェハ面内でのガスの流れ方が不均一であり
、ガスの濃度分布が不均一なため、被エツチング膜をエ
ツチングする反応ガスのラジカル化やイオン化が効率よ
く行なわれたり、一方そうではなかったりする場合があ
るため、工・ノチング速度がウェハ中心部と周辺部では
不均一になリ、特に周辺部でのエツチング速度が高く、
中心部でのそれは遅くなって不均一なエツチングが生じ
ていた。Since the conventional dry etching equipment is configured as described above, the flow of gas within the wafer surface is non-uniform, and the concentration distribution of the gas is non-uniform, so the reaction gas used to etch the film to be etched is Radicalization and ionization may be performed efficiently or not, so the etching/notching speed may be uneven between the center and the periphery of the wafer, and the etching speed may be particularly high at the periphery.
In the center it was slow and uneven etching occurred.
この発明は上記のような問題点を解消するためになされ
たもので、ウェハ面内で中心部と周辺部のいずれにも均
一にエツチングできる半導体ドライエツチング装置を得
ることを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor dry etching apparatus that can uniformly etch both the center and the periphery of a wafer.
この発明に係る半導体ドライエツチング装置は、平行平
板電極の上部電極に反応ガスの吹出口を多数個設け、さ
らにこれを回転させるようにしたものである。The semiconductor dry etching apparatus according to the present invention has a plurality of reaction gas outlets provided on the upper electrode of the parallel plate electrode, and is further configured to rotate.
この発明における半導体ドライエツチング装置では、上
部電極に設けたガスの吹出口を回転させるから、ウェハ
面上でのガス濃度分布が均一化され、被エツチング膜が
均一よくエツチングされる。In the semiconductor dry etching apparatus according to the present invention, since the gas outlet provided in the upper electrode is rotated, the gas concentration distribution on the wafer surface is made uniform, and the film to be etched is etched uniformly.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図において、ｌは上部電極、２は下部電極、５は反
応室、６はウェハ、７は高周波電力印加装置、８は容量
器である。また３は上部電極１の上端部１ａ内に設けら
れ、エツチングガスを導入するためのガス導入口、９は
上部電極１の下面に設けられ、多数個のガス吹出口９ａ
を有する導体からなる回転板であり、これは電気的には
上部電極１の一部となっている。９ｂは回転板９のガス
吹出口９ａ形成部である。ｌＯは該回転板９を回転させ
るモータである。In FIG. 1, 1 is an upper electrode, 2 is a lower electrode, 5 is a reaction chamber, 6 is a wafer, 7 is a high frequency power application device, and 8 is a capacitor. Further, numeral 3 is provided in the upper end portion 1a of the upper electrode 1, and is a gas inlet port for introducing etching gas, and numeral 9 is provided in the lower surface of the upper electrode 1, and is provided with a large number of gas outlet ports 9a.
This is a rotary plate made of a conductor having a conductor, which is electrically a part of the upper electrode 1. 9b is a portion of the rotating plate 9 where the gas outlet 9a is formed. IO is a motor that rotates the rotating plate 9.
次に動作について説明する。Next, the operation will be explained.
本実施例装置のように、ガスの吹出口９ａを上部電極１
の下面に設置した回転板９に多数個設け、該電極１全体
からガスを吹き出させるようにし、かつこの吹出口９ａ
を回転板９を回転させることによって回転させると、反
応室５内でのガス濃度の分布は一様になり、ウェハ６表
面上でのラジカル化、イオン化が効率よく行なわれ、被
エツチング膜を均一性よくエツチングすることができる
。As in the device of this embodiment, the gas outlet 9a is connected to the upper electrode 1.
A large number of electrodes are provided on the rotary plate 9 installed on the lower surface of the electrode 1, and the gas is blown out from the entire electrode 1, and the air outlet 9a is
By rotating the rotating plate 9, the gas concentration distribution in the reaction chamber 5 becomes uniform, radicalization and ionization on the surface of the wafer 6 are efficiently performed, and the film to be etched is uniformly spread. Can be sexually etched.
なお、上記実施例では、ウェハ処理は１枚のみの場合を
示したが、これは数枚同時処理を行なってもよく、上記
実施例と同様の効果を奏する。また、上記実施例は上部
電極に高周波電力を印加するものを示したが、これは下
部電極に高周波電力を印加するものでもよく、上記と同
様の効果を奏する。In the above embodiment, only one wafer is processed, but several wafers may be processed simultaneously and the same effects as in the above embodiment can be obtained. Furthermore, although the above embodiments have shown the case in which high frequency power is applied to the upper electrode, this may be such that high frequency power is applied to the lower electrode, and the same effects as described above can be obtained.
以上のように、この発明によれば、平行平板電極の上部
電極に反応ガスの吹出口を多数個設け、さらにこれを回
転させるようにしたがら、ウェハ表面の被エツチング膜
を均一にエツチングでき、ウェハ中心と周辺で安定した
被エツチング膜を加工することができる効果がある。As described above, according to the present invention, by providing a large number of reactive gas outlets on the upper electrode of the parallel plate electrode and rotating the outlet, the film to be etched on the wafer surface can be uniformly etched, and the wafer can be etched uniformly. This has the effect of making it possible to process a film to be etched that is stable at the center and periphery.
第１図はこの発明の一実施例による半導体ドライエツチ
ング装置の断面図、第２図は上記装置の回転板の平面図
、第３図は従来の半導体ドライエツチング装置の断面図
である。
ｌ・・・上部電極、２・・・下部電極、３・・・ガス導
入口、４・・・カス排ｆｉ口、５・・・反応室、６・・
・ウェハ、７・・・高周波電力印加装置、８・・・容量
器、９・・・回転板、９ａ・・・ガス吹出口、１０・・
・モータ。
なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a sectional view of a semiconductor dry etching apparatus according to an embodiment of the present invention, FIG. 2 is a plan view of a rotary plate of the apparatus, and FIG. 3 is a sectional view of a conventional semiconductor dry etching apparatus. l... Upper electrode, 2... Lower electrode, 3... Gas inlet, 4... Waste exhaust fi port, 5... Reaction chamber, 6...
- Wafer, 7... High frequency power application device, 8... Capacitor, 9... Rotating plate, 9a... Gas outlet, 10...
·motor. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
置において、平行平板電極の上部電極に複数個設けられ
たエッチングガスを吹き出させるガス吹出口と、上記上
部電極の少なくとも上記吹出口を有する部分を回転させ
る回転駆動手段とを備えたことを特徴とする半導体ドラ
イエッチング装置。(1) In a semiconductor dry etching apparatus for etching a thin film, a plurality of gas outlets for blowing out etching gas are provided on the upper electrode of a parallel plate electrode, and rotation for rotating at least a portion of the upper electrode having the outlet. A semiconductor dry etching apparatus characterized by comprising: a driving means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2327285A JPS61182226A (en) | 1985-02-07 | 1985-02-07 | Semiconductor dry etching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2327285A JPS61182226A (en) | 1985-02-07 | 1985-02-07 | Semiconductor dry etching device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61182226A true JPS61182226A (en) | 1986-08-14 |
Family
ID=12105964
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2327285A Pending JPS61182226A (en) | 1985-02-07 | 1985-02-07 | Semiconductor dry etching device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61182226A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100342488C (en) * | 2001-08-28 | 2007-10-10 | Nec液晶技术株式会社 | Substrate processing system for performing exposure process in gas atmosphere |
-
1985
- 1985-02-07 JP JP2327285A patent/JPS61182226A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100342488C (en) * | 2001-08-28 | 2007-10-10 | Nec液晶技术株式会社 | Substrate processing system for performing exposure process in gas atmosphere |
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