JPS61182047U - - Google Patents
Info
- Publication number
- JPS61182047U JPS61182047U JP6652885U JP6652885U JPS61182047U JP S61182047 U JPS61182047 U JP S61182047U JP 6652885 U JP6652885 U JP 6652885U JP 6652885 U JP6652885 U JP 6652885U JP S61182047 U JPS61182047 U JP S61182047U
- Authority
- JP
- Japan
- Prior art keywords
- chip carrier
- featuring
- firing
- stacked
- printing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07552—Controlling the environment, e.g. atmosphere composition or temperature changes in structures or sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/521—Structures or relative sizes of bond wires
- H10W72/527—Multiple bond wires having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
Landscapes
- Combinations Of Printed Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6652885U JPS61182047U (enExample) | 1985-05-07 | 1985-05-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6652885U JPS61182047U (enExample) | 1985-05-07 | 1985-05-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61182047U true JPS61182047U (enExample) | 1986-11-13 |
Family
ID=30599521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6652885U Pending JPS61182047U (enExample) | 1985-05-07 | 1985-05-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61182047U (enExample) |
-
1985
- 1985-05-07 JP JP6652885U patent/JPS61182047U/ja active Pending