JPS61174696A - Manufacture of ceramic multilayer interconnection board - Google Patents

Manufacture of ceramic multilayer interconnection board

Info

Publication number
JPS61174696A
JPS61174696A JP1411085A JP1411085A JPS61174696A JP S61174696 A JPS61174696 A JP S61174696A JP 1411085 A JP1411085 A JP 1411085A JP 1411085 A JP1411085 A JP 1411085A JP S61174696 A JPS61174696 A JP S61174696A
Authority
JP
Japan
Prior art keywords
conductor
ceramic multilayer
plating
hole
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1411085A
Other languages
Japanese (ja)
Inventor
三森 誠司
堀部 芳幸
上山 守
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP1411085A priority Critical patent/JPS61174696A/en
Publication of JPS61174696A publication Critical patent/JPS61174696A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はセラミック多層配線板の製造方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a ceramic multilayer wiring board.

(従来の技術) 従来のセラミック多層配線板はセラミックグリーンシー
ト(以下グリーンシートとする)を・くンチにより外形
を形成し2次いでパンチ、ドリルなどにより穴加工した
後タングステン、モリブデン。
(Prior art) Conventional ceramic multilayer wiring boards are made by punching ceramic green sheets (hereinafter referred to as green sheets) to form an outer shape, and then punching, drilling, etc. to form holes, and then inserting tungsten or molybdenum.

マンガン等の高融点金属粉末を主成分とした導体ペース
トをグリーンシート上に印刷したシ穴に充填して導体部
を形成し1次にその上面に絶縁体を形成しそして再びそ
の上面および穴に導体部を形成し、これらの工程を数回
繰シ返して多層構造とした後弱還元性などの雰囲気中で
1500〜1700℃の温度で同時焼成して製造してい
た。
A conductor paste containing high-melting point metal powder such as manganese is filled into the holes printed on the green sheet to form a conductor part.First, an insulator is formed on the top surface of the conductor part, and then an insulator is formed on the top surface and the hole again. A conductor portion is formed, these steps are repeated several times to obtain a multilayer structure, and the product is then simultaneously fired at a temperature of 1500 to 1700° C. in a weakly reducing atmosphere.

(発明が解決しようとする問題点) しかしながらこの方法では焼成時のグリーンシートの収
縮により、外形寸法、穴の寸法およびその位置精度に約
1%のバラツキが生じる。また導体ペースト、グリーン
シート等を同時に焼結して一括形成されるため、パター
ンに変更があった場合、パンチ金型などを変えなければ
ならないため高価になるなどの欠点が生じる。
(Problems to be Solved by the Invention) However, in this method, the shrinkage of the green sheet during firing causes a variation of about 1% in the external dimensions, hole dimensions, and positional accuracy. Furthermore, since the conductor paste, green sheet, etc. are simultaneously sintered and formed in one batch, if there is a change in the pattern, the punch mold etc. must be changed, resulting in disadvantages such as increased costs.

本発明は高い寸法精度をもち、かつ安価なセラミック多
層配線板の製造方法を提供することを目的とするもので
ある。
An object of the present invention is to provide a method for manufacturing a ceramic multilayer wiring board that has high dimensional accuracy and is inexpensive.

(問題点を解決するための手段) 本発明者らは上記の欠点について種々検討した結果、内
部に少なくとも2層の導体層を含むセラミック基板を2
機械的又はエネルギーにより内部の2層の導体層の一部
が露出するように表裏を貫通させるか或は途中まで穴を
形成し、露出した内部導体をメッキし、さらにその後メ
ッキした部分を導体ペースト、他のメッキ等で導通させ
、その部分を表面に露出することにより上記の問題が解
決できることを確認した。
(Means for Solving the Problems) As a result of various studies on the above-mentioned drawbacks, the present inventors have found that two ceramic substrates each having at least two conductor layers therein.
Mechanically or with energy, the two internal conductor layers are partially exposed by penetrating the front and back sides or forming a hole halfway, plating the exposed internal conductor, and then applying conductive paste to the plated part. It has been confirmed that the above problem can be solved by making conductivity with other plating or the like and exposing that part to the surface.

本発明は内部に少なくとも2層の導体層を含むセラミッ
ク基板を2機械的又はエネルギーにより内部の2層の導
体層の一部が露出するように表裏を貫通させるか或は途
中まで穴を形成する工程と。
In the present invention, a ceramic substrate having at least two internal conductor layers is made to penetrate through the front and back sides, or to form a hole halfway, so that a part of the two internal conductor layers is exposed using mechanical force or energy. With the process.

露出した内部導体をメッキする工程と、メッキした部分
と導通させその導通部分を表面に露出させる工程とから
なるセラミック多層配線板の製造方法に関する。
The present invention relates to a method for manufacturing a ceramic multilayer wiring board, which comprises a step of plating the exposed internal conductor, and a step of making the plated portion conductive and exposing the conductive portion to the surface.

本発明において導体層を形成する高融点金属粉末どして
はタングステン、モリブデン、マンガン等が用いられ、
絶縁体を形成するための材料としてはグリーンシート、
グリーンシートにする前のセラミックスリップ等が用い
られる。
In the present invention, tungsten, molybdenum, manganese, etc. are used as the high melting point metal powder forming the conductor layer.
Green sheets are used as materials for forming insulators,
A ceramic slip or the like is used before being made into a green sheet.

穴加工を行なう機械的又はエネルギ一方法としては超音
波、レーザー、エレクトロンビーム等の方法があるが、
焼結したセラミック基板を穴加工できれば上記の方法に
限定するものではない。
Mechanical or energy methods for drilling holes include ultrasonic waves, lasers, electron beams, etc.
The method is not limited to the above method as long as a hole can be formed in a sintered ceramic substrate.

穴加工によって露出する内部導体へのメッキの種類、膜
厚については特に制限はないがニッケルメッキを施すこ
とが好ましい。
Although there are no particular restrictions on the type and thickness of plating on the internal conductor exposed by drilling, nickel plating is preferably applied.

メッキ後メッキした部分と導通させ、その部分を表面に
露出するための材料としては銅、金、銀。
Copper, gold, and silver are the materials used to connect the plated part after plating and expose that part to the surface.

白金等が用いられ、これらはペースト状のものを印刷し
て形成してもよく、メッキにより形成してもよぐ特に制
限はをい。
Platinum or the like is used, and these may be formed by printing a paste or by plating, although there are no particular restrictions.

C実施例) 以下図面を引用して本発明の詳細な説明する。Example C) The present invention will be described in detail below with reference to the drawings.

実施例1 第1図の(a)に示すグリーンシート1の上下面にタン
グステン粉末を主成分とした導体ペースト(アサと化学
研究所製、商品名3TW−1200)を印刷して第1図
の(b)K示すような導体層2を形成した後、その両表
面にグリーンシートと同一組成の絶縁ペーストを印刷し
て第1図の(C)に示すような絶縁層3を形成した。こ
の後弱還元性雰囲気中で、1600℃の温度で1時間焼
成して第1図の(d)に示すような焼結した導体層2′
を内層したセラミック基板を得た。
Example 1 A conductive paste (trade name 3TW-1200, manufactured by Asato Kagaku Kenkyusho Co., Ltd.) containing tungsten powder as a main component was printed on the upper and lower surfaces of the green sheet 1 shown in (a) of Fig. 1. (b) After forming the conductor layer 2 as shown in K, an insulating paste having the same composition as the green sheet was printed on both surfaces thereof to form an insulating layer 3 as shown in FIG. 1(C). Thereafter, the conductor layer 2' is sintered in a slightly reducing atmosphere at a temperature of 1600°C for 1 hour to form a sintered conductor layer 2' as shown in FIG. 1(d).
A ceramic substrate was obtained with an inner layer of

次に第1図の(e)に示すように超音波によりスルーホ
ール4を形成し、さらに第1図の(f)に示すようにス
ルーホール内壁面に露出した導体層2′の部分[ニッケ
ルめつき5を3μmの厚さに施し2次いでキユアリング
タイプの銅ペースト(旭化学研究所製、商品名ACP−
030)を前記のスルーホール4.ニッケルめつき5を
施した部分およびスルーホール4の端部に接する両表面
の一部に塗布して第1図の(g)に示すような表面導体
6を形成した。この後所定寸法に力a工してセラミック
多層配線板を得た。
Next, as shown in FIG. 1(e), a through hole 4 is formed using ultrasonic waves, and as shown in FIG. Plating 5 was applied to a thickness of 3 μm, and then curing type copper paste (manufactured by Asahi Chemical Research Institute, trade name ACP-
030) through the above-mentioned through hole 4. A surface conductor 6 as shown in FIG. 1(g) was formed by coating the nickel plating 5 and parts of both surfaces in contact with the ends of the through holes 4. Thereafter, a ceramic multilayer wiring board was obtained by mechanical work to a predetermined size.

実施例2 第2図の伸)K示すグリーンシート1の上下面に平均粒
径が1.5μmのモリブデン粉末80重量%およびマン
ガン粉末20重量−の混合物100重量部に対しメチル
セルロース3重量部それに溶剤として適量のプチルカル
ビI・−ルアセテートを加えて均一に混合した導体ペー
ストを印刷して第1図の(b)に示すような導体層2を
形成し9次いでその両表面に他のグリーンシートでサン
ドイッチ状に挾み熱圧着して積層し、第2図の(C)の
ようKした。この後弱還元性雰囲気中で、1600℃の
温度で1時間焼成して第2図の(d)に示すような焼結
した導体層2′を内層したセラミック基板を得た。
Example 2 3 parts by weight of methyl cellulose and a solvent were added to 100 parts by weight of a mixture of 80% by weight of molybdenum powder with an average particle size of 1.5 μm and 20% by weight of manganese powder on the upper and lower surfaces of the green sheet 1 shown in Figure 2 (Extension) K. A suitable amount of butylcarbyl acetate was added thereto and mixed uniformly, and a conductor paste was printed to form a conductor layer 2 as shown in Fig. 1(b).9 Then, other green sheets were coated on both surfaces. They were sandwiched together, thermocompressed and laminated, and then molded as shown in FIG. 2(C). Thereafter, it was fired in a weakly reducing atmosphere at a temperature of 1600 DEG C. for 1 hour to obtain a ceramic substrate having a sintered conductor layer 2' as shown in FIG. 2(d).

次に第2図の(e)t/C示すようにレーザーでスルー
ホール4を形成し、さらに第2図の(f)K示すように
スルーホール内壁面に露出した導体層グの部分にニッケ
ルめつき5を3μmの厚さに施し2次いでスルーホール
4の部分に感受性化処理、活性化処理を行なった後、鋼
めつきを前記のスルーホール4Iニツケルめつき5を施
した部分およびスルーホール4の端部忙接する両表面の
一部に5μmの厚さに施して第2図の(g)に示すよう
な表面導体6を形成した。この後所定寸法に加工してセ
ラミック多層配線板を得た。
Next, as shown in FIG. 2 (e) t/c, a through hole 4 is formed using a laser, and as shown in FIG. After applying plating 5 to a thickness of 3 μm and sensitizing and activating the through hole 4 portion, steel plating is applied to the through hole 4 I and the portion where nickel plating 5 has been applied and the through hole. A surface conductor 6 having a thickness of 5 μm was formed on a portion of both surfaces which were in contact with the ends of the conductor 4, as shown in FIG. 2(g). Thereafter, it was processed to a predetermined size to obtain a ceramic multilayer wiring board.

なお実施例ではセラミック基板への表面導体は銅により
形成したが、ホーロー基板などに低温焼成のAg/Pd
導体を形成してもよい。ただしこの場合は、ニッケルめ
っきしたのち金めつきを施すなど内層導体の耐酸化膜を
形成する必要がある。
In the example, the surface conductor on the ceramic substrate was formed of copper, but low-temperature fired Ag/Pd was formed on the enamel substrate etc.
A conductor may also be formed. However, in this case, it is necessary to form an oxidation-resistant film on the inner layer conductor, such as by performing nickel plating and then gold plating.

(発明の効果) 本発明によれば超音波、レーザーなどにより焼結シたセ
ラミックスにスルーホールを形成するため、パターンに
変更があった場合でもパンチ金型を用意する必要がなく
、パターン変更に対して容易に対応でき、またスルーホ
ールの寸法精度はセラミックスの焼結収縮のバラツキを
無視できる九め、高い寸法精度をもち、かつ安価なセラ
ミック多層配線板を得ることができる。
(Effects of the Invention) According to the present invention, since through-holes are formed in sintered ceramics using ultrasonic waves, lasers, etc., there is no need to prepare a punch mold even if the pattern is changed. Furthermore, the dimensional accuracy of the through holes is such that variations in sintering shrinkage of ceramics can be ignored, making it possible to obtain an inexpensive ceramic multilayer wiring board with high dimensional accuracy.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例になるセラミック多層配線板
の製造作業状態を示す断面図および第2図は本発明の他
の一実施例になるセラミック多層配線板の製造作業状態
を示す断面図である。 符号の説明 1・・・グリーンシート  2・・・導体層3・・・絶
縁層      4・・・スルーホール5・・・ニッケ
ルめつき  6・・・表面導体’T−t  図 Y2 図
FIG. 1 is a cross-sectional view showing the manufacturing process of a ceramic multilayer wiring board according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the manufacturing process of a ceramic multilayer wiring board according to another embodiment of the invention. It is a diagram. Explanation of symbols 1...Green sheet 2...Conductor layer 3...Insulating layer 4...Through hole 5...Nickel plating 6...Surface conductor'T-t Figure Y2 Figure

Claims (1)

【特許請求の範囲】[Claims] 1、内部に少なくとも2層の導体層を含むセラミック基
板を、機械的又はエネルギーにより内部の2層の導体層
の一部が露出するように表裏を貫通させるか或は途中ま
で穴を形成する工程と、露出した内部の2層の導体をメ
ッキする工程と、メッキした部分と導通させその導通部
分を表面に露出させる工程とからなることを特徴とする
セラミック多層配線板の製造方法。
1. A process of penetrating the front and back of a ceramic substrate containing at least two conductive layers internally or forming a hole halfway so that a part of the two internal conductive layers is exposed by mechanical or energy. A method for manufacturing a ceramic multilayer wiring board, comprising the steps of: plating the exposed internal two-layer conductor; and connecting the plated portion to the conductive portion to expose the conductive portion to the surface.
JP1411085A 1985-01-28 1985-01-28 Manufacture of ceramic multilayer interconnection board Pending JPS61174696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1411085A JPS61174696A (en) 1985-01-28 1985-01-28 Manufacture of ceramic multilayer interconnection board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1411085A JPS61174696A (en) 1985-01-28 1985-01-28 Manufacture of ceramic multilayer interconnection board

Publications (1)

Publication Number Publication Date
JPS61174696A true JPS61174696A (en) 1986-08-06

Family

ID=11851975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1411085A Pending JPS61174696A (en) 1985-01-28 1985-01-28 Manufacture of ceramic multilayer interconnection board

Country Status (1)

Country Link
JP (1) JPS61174696A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05191048A (en) * 1992-01-13 1993-07-30 Murata Mfg Co Ltd Manufacture of ceramic multilayer electronic component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05191048A (en) * 1992-01-13 1993-07-30 Murata Mfg Co Ltd Manufacture of ceramic multilayer electronic component

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