JPS6117441Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a rotation speed switching device in a constant speed digital servo system, and in order to obtain a digital quantity corresponding to the rotation speed of a motor that rotates at a constant speed,
It is an object of the present invention to provide a rotation speed switching device that can extremely easily and accurately switch the rotation speed of the motor by switching the repetition frequency of a clock pulse that is gated out at every predetermined period of the motor rotation detection pulse. do.

In general, constant speed rotation servo systems for motors include analog servo systems that use analog signals for each circuit making up the servo system, and digital servo systems that use digital signals. Compared to analog servo systems, digital servo systems can reduce the number of resistors, capacitors, etc. used, and therefore have a simpler circuit configuration. It has the advantages of being small and highly reliable, as it uses highly stable clock pulses as a medium, which greatly reduces drift, and since it handles digital information, it is less susceptible to the effects of unnecessary signal weight. There is also a significant improvement from the viewpoint of weight reduction.

The present invention is a digital servo system in which the rotational speed of the motor can be changed easily and accurately, and one embodiment thereof will be described below with reference to the drawings.

FIG. 1 shows a block system diagram of an embodiment of a rotation speed switching device in a constant speed digital servo system according to the present invention. In the figure, reference numeral 1 denotes a controlled motor, and a disk 2 is fixedly attached to one end of its rotating shaft. There are S and N poles at equal intervals on the circumferential side of the disk 2.
The pole magnets 3 are arranged alternately. Further, a detection head 4 is provided with a gap surface at a position facing away from the magnet 3, and each time the magnet 3 of the disk 2, which rotates integrally with the rotation of the motor 1, crosses in front of the detection head 4, the motor The detection head 4 outputs a substantially sinusoidal signal with a repetition frequency proportional to the rotational speed. This approximately sinusoidal signal is converted into a pulse train by the pulse forming circuit 5 and then supplied to the 1/2 frequency divider 6, where conversion errors in the pulse forming circuit 5 are prevented from occurring and the signal is converted into a symmetrical square wave.

This symmetrical square wave is a square wave a having a repetition frequency proportional to the rotational speed of the motor 1 as shown in FIG. At the same time as it is applied to one input terminal, it is applied to the reset terminal of the binary counter 9 in the microcomputer 8 as a reset pulse.

On the other hand, the oscillation output of the crystal oscillator 10 is supplied to a 1/n ₁ frequency divider 19, a 1/n ₂ frequency divider 20, and a 1/n ₃ frequency divider 21, and is frequency-divided, respectively. 1/n ₁ frequency divider 19
The 1/n ₁ frequency division output is the fixed terminal 2 of the changeover switch 22.
2a, the 1/n ₂ frequency divided output of the 1/n 2 frequency divider 20 is applied to the fixed terminal 22b, and the 1/n ₂ frequency divided output of the 1/n ₂ frequency divider 20 is applied to the fixed terminal 22b.
The 1/n ₃ frequency-divided output is applied to the fixed terminal 22c. The changeover switch 22 has the above-mentioned fixed terminals 22a,
One of the analog signals input to 22b and 22c is selectively outputted and applied as a clock pulse to the other input terminal of the AND circuit 7 from the common terminal 22d. This clock pulse has a waveform as shown by b in FIG. The upper limit is limited so that the cost does not increase due to an increase in counting capacity and the number of pits.

In this way, as shown in FIG. , is counted here. Therefore, the binary counter 9 counts and outputs the number of clock pulses during the high level period of the speed detection pulse a for each high level period of the speed detection pulse a, thereby converting the rotational speed of the motor 1 into a binary digital quantity N. It will be converted. For example, the binary counter 9, which is reset at the rising edge of the speed detection pulse a, starts from time _t1 .
The number of clock pulses shown as _c1 in FIG. _2C that entered the high level period of the speed detection pulse a up to t2 is counted, and the counted value shown as _d2 in FIG. 2D is output after time _t2 . , it is held until the arrival time _t3 of the rising edge of the next speed detection pulse a, and the next speed detection pulse a is
The number of clock pulses shown as c ₂ in C of FIG. 2 that entered during the high level period (from time t ₃ to t ₄ ) is counted, and the counted value shown as d ₃ in D of the same figure is output after time t ₄ . .

The count value N of the binary counter 9, which has the values shown as d ₁ , d ₂ , and d ₃ in FIG. 2D, is digitally calculated by the microcomputer 8 as follows. The output count value N of the binary counter 9 is subtracted by the reference value N _R corresponding to the reference speed of the motor 1 set in the memory 12 in the subtracter 11, and the error value N _E is obtained as shown in FIG. 2E. (=N- _NR ) is calculated.
This error value N _E is multiplied by K ₂ (K ₂ < 1
In this embodiment, K ₂ = 1/2M (M is an arbitrary integer)) and then sequentially added by the accumulator 14 to obtain the cumulative value (value obtained by the integrating means) N ₁
(=ΣK ₂ ·N _E ) is obtained. This accumulated value _N1 is determined by the output count value N of the binary counter 9 in the adder 15.
_The sum is added to give an added value that changes as shown in FIG. Therefore, the binary number N _O taken out from the arithmetic unit 16 is expressed as K ₁ (N+N _I ), changes as shown in FIG. 2G, and is applied to the DA converter 17 as the output of the microcomputer 8. . The timing of the above calculation operation is such that the operation is performed at the falling edge of the speed detection pulse a, as shown in FIGS. 2D to 2G, respectively.

The binary number N _O obtained by digital calculation by the microcomputer 8 as described above is DA
It is converted into an analog quantity (voltage) by the converter 17 and is supplied to the motor drive amplifier 18 as a voltage h as shown in FIG. do.

As described above, in this embodiment, the motor 1, the disc 2, the detection head 4, the pulse forming circuit 5, the 1/2 frequency divider 6, the AND circuit 7, the binary counter 9, the adder 15, the arithmetic unit 16, and the DA In addition to the speed feedback loop consisting of the converter 17 and motor drive amplifier 18, the digital arithmetic unit of the microcomputer 8 inputs the error value N _E between the output value N of the binary counter 9 and the reference value N _R of the memory 12. K ₁ after _2x is accumulated
Since an integral feedback loop that multiplies and feeds back is configured, the motor 1 can be controlled to rotate at a constant speed with a simple circuit configuration without using a phase comparator or the like.

Now, assuming that the rotational speed of the motor 1 has become slower than the reference speed set in the memory 12, the period of the rotation detection pulse a will be longer than the reference value, so the output count value N of the binary counter 9 will be large. Then,
At the same time as the output value of the speed feedback loop increases, N becomes larger than the reference value N _R in the memory 12, so the error value N _E becomes positive and the accumulated value N _I in the accumulator 14 increases. However, the output value of the integral feedback loop also increases. For this reason,
The output value N _O of the microcomputer 8 increases,
Since the voltage applied to motor 1 increases, motor 1
The rotation speed of increases. When the rotational speed increases until it becomes equal to the reference speed, the output count value N of the binary counter 9 changes to the reference value N _R in the memory 12.
, and the difference between them, the error value N _E , becomes zero, so the cumulative value N _I becomes a constant value and does not change. Therefore, the output value N _O of the microcomputer 8 becomes a constant value, and the voltage applied to the motor 1 also becomes a constant level, so that the rotational speed of the motor 1 is stabilized at the reference speed.

On the other hand, when the rotation speed of the motor 1 becomes faster than the reference speed, the output count value N of the binary counter 9 becomes small, and the output value of the speed feedback loop also becomes small. At the same time, since N becomes smaller than the reference value N _R in the memory 12, the error value N _E
becomes negative, the cumulative value N _I decreases, and therefore the output value of the integral feedback loop decreases. Therefore, the output value N of the microcomputer 8
_O also decreases, the voltage applied to the motor 1 decreases, and the rotational speed of the motor 1 decreases. When the rotational speed of motor 1 decreases until it becomes equal to the reference speed, the error value N _E between N and reference value N _R becomes zero as described above, so the output value N _O becomes constant and the rotation of motor 1 The speed is also stabilized at a rotational speed equal to the reference speed.

Next, to explain the rotation speed switching operation of the motor 1, in FIG. 1, the changeover switch 22 is connected to the fixed terminal 22a, and the pulse example shown as _c1 in FIG. 2C is taken out from the changeover switch 22. Assuming this, the number of clock pulses output from the gate during the period from time _t1 to time _t2 is seven. Therefore, if the reference digital value in the memory 12 is "7" at this time, the motor 1 maintains a predetermined rotational speed corresponding to this reference digital value.

Next, when the changeover switch 22 is connected to the fixed terminal 22b and the clock pulse from the 1/n ₂ frequency divider 20 is applied to the AND circuit 7, for example, the repetition frequency of the clock pulse at this time is 1/n ₁ minute. Assuming that the output of the frequency generator 19 is selected to be twice that, the number of gate outputs (sampling number) of clock pulses during the period corresponding to the above-mentioned time _t1 to _t2 will be 14. By comparing this value (N=14) with the reference digital value "7", the output error value N _E of the subtracter 11 becomes "+7". As a result, the rotational speed of the motor 1 increases as described above, and the rotational speed increases until the repetition frequency of the rotation detection pulse a doubles and the number of clock pulses gated out from the AND circuit 7 reaches 7. Rise. When the repetition frequency of the rotation detection pulse a doubles, that is, when the rotation speed of the motor 1 becomes twice that when the fixed terminal 22a of the changeover switch 22 is connected, the output count value N of the binary counter 9
and the reference digital value N _R in the memory 12 are both "7" and are equal, so the error value N _E becomes zero, and the rotation speed of the motor 1 no longer increases.
The rotation speed can be maintained.

Further, when the changeover switch 22 is connected to the fixed terminal 22c, the rotational speed of the motor 1 is switched in proportion to the repetition frequency of the output clock pulse of the frequency divider 21 according to the same operating principle as described above.

Note that in the above embodiment, three frequency dividers 19, 2
Although the oscillation output of the crystal oscillator 10 is frequency-divided by 0 and 21 to obtain clock pulses with three different repetition frequencies, the point is that it is sufficient to generate a plurality of clock pulses with different repetition frequencies. It is clear that a multiplier that multiplies the oscillation output of may be used. Furthermore, although one clock pulse is selectively obtained by the changeover switch 22, the repetition frequency of the clock pulse may be configured to be continuously variable.

As mentioned above, the rotation speed switching device in the constant speed digital servo system according to the present invention includes means for variably switching the repetition frequency of clock pulses, and counting the number of clock pulses output from the means for variably switching during a predetermined period of rotation detection pulses. a digital counter that outputs the data as a digital quantity, a memory storing a reference digital value, an accumulating means for multiplying and accumulating the difference between the reference digital value and the digital quantity by a coefficient of 1 or less, and an accumulating means. and an arithmetic means for multiplying the sum of the output of the digital counter and the output of the digital counter by a coefficient, and outputting the result.
The rotation speed of the motor is kept constant by controlling the driving voltage of the motor using the output of the calculation means, and the rotation speed of the motor is changed by changing the repetition frequency of the clock pulse. The rotation speed of the motor can be changed extremely easily without changing the reference digital value that has been set, and without the need for operations such as changing the predetermined center voltage of the motor, which was conventionally done with analog servo systems. Furthermore, since it uses digital information, it has the advantage of being able to construct a high-information switching device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the device of the present invention, and FIG. 2A-H are time charts for explaining the operation of FIG. 1. 1 ... controlled motor, 8 ... microcomputer, 9 ... binary counter, 11 ... subtractor, 1
2: memory; 13, 16: computing unit; 14:
Accumulator, 15...adder, 17...DA converter,
19...1/n ₁ divider, 20...1/n ₂ divider, 21
...1/n ₃ divider, 22...switch.

Claims (1)

[Scope of utility model registration request] a digital quantity corresponding to the number of revolutions of the motor, which is obtained by gate-outputting a clock pulse for each predetermined period of a rotation detection pulse having a repetition frequency according to the number of revolutions of the motor, and an error value obtained by comparing each of the digital quantities with a preset reference digital value, to obtain a drive voltage for the motor;
a digital counter which counts the number of clock pulses output from said variable switching means during a predetermined period of said rotation detection pulse and outputs the counted number as said digital quantity; a memory in which said reference digital value is stored; accumulation means which multiplies the difference between said reference digital value and said digital quantity by a coefficient not greater than 1 and accumulates the result; and calculation means which multiplies the sum of an output of said accumulation means and an output of said digital counter by a coefficient and outputs the resultant product,