JPS6117383B2 - - Google Patents

Info

Publication number
JPS6117383B2
JPS6117383B2 JP53056675A JP5667578A JPS6117383B2 JP S6117383 B2 JPS6117383 B2 JP S6117383B2 JP 53056675 A JP53056675 A JP 53056675A JP 5667578 A JP5667578 A JP 5667578A JP S6117383 B2 JPS6117383 B2 JP S6117383B2
Authority
JP
Japan
Prior art keywords
signal
sampling
phase
oscillator
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53056675A
Other languages
English (en)
Japanese (ja)
Other versions
JPS54148414A (en
Inventor
Kunihiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP5667578A priority Critical patent/JPS54148414A/ja
Publication of JPS54148414A publication Critical patent/JPS54148414A/ja
Publication of JPS6117383B2 publication Critical patent/JPS6117383B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP5667578A 1978-05-15 1978-05-15 Reproduction system for timing information Granted JPS54148414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5667578A JPS54148414A (en) 1978-05-15 1978-05-15 Reproduction system for timing information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5667578A JPS54148414A (en) 1978-05-15 1978-05-15 Reproduction system for timing information

Publications (2)

Publication Number Publication Date
JPS54148414A JPS54148414A (en) 1979-11-20
JPS6117383B2 true JPS6117383B2 (enrdf_load_html_response) 1986-05-07

Family

ID=13033987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5667578A Granted JPS54148414A (en) 1978-05-15 1978-05-15 Reproduction system for timing information

Country Status (1)

Country Link
JP (1) JPS54148414A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4740997A (en) * 1985-08-05 1988-04-26 Hayes Microcomputer Products, Inc. Band clock offset phase locked loop

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS523770B2 (enrdf_load_html_response) * 1972-10-17 1977-01-29
JPS4960863A (enrdf_load_html_response) * 1972-10-17 1974-06-13
JPS4960813A (enrdf_load_html_response) * 1972-10-17 1974-06-13

Also Published As

Publication number Publication date
JPS54148414A (en) 1979-11-20

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