JPS6116991B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a musical sound waveform in an electronic musical instrument, and more particularly to a method of forming a musical sound waveform using a digital circuit.

As prior art to this invention, the applicant of the present invention
Patent Application No. 1975 filed on December 16, 1950
No. 149148 (Japanese Unexamined Patent Publication No. 52-73721) "Electronic Musical Instrument" (hereinafter referred to as "earlier application"). In the earlier application, a musical sound waveform read from a waveform memory is applied to the input terminal of a filter having desired frequency characteristics, and the musical sound waveform appearing at the output terminal of the filter is delayed by one cycle and then applied to the input terminal of the filter again. The musical sound waveform is circulated through the filter, and each time it passes through the filter, a musical sound waveform that sequentially changes depending on the characteristics of the filter is extracted. A digital filter is used as a preferable design example of the filter in the earlier application,
The musical sound waveform circulates through this digital filter in the form represented by digital codes. Therefore, it is easy to change the parameters that determine the transmission characteristics of the filter, and in this way it is possible to generate a musical sound waveform whose waveform changes over time and obtain a rich and varied musical tone. did it.

However, the drawback of the earlier application is that the circuit becomes complicated and expensive in order to construct a digital filter with advanced characteristics. The design of a digital filter is well known, and a detailed explanation thereof will be omitted, but generally a digital filter is composed of circuits such as a delay circuit, an attenuation circuit, and an addition circuit.For example, in order to obtain sharp cutoff characteristics, the above-mentioned It is necessary to combine many circuits, resulting in a very complex circuit.
In particular, it is easy to understand that the electronic musical instruments of the earlier application are generally complicated and expensive, since they require filters with sophisticated characteristics to generate the desired musical tones.

The object of the present invention is to eliminate the above-mentioned drawbacks, namely, to provide a method of forming a musical sound waveform that allows desired filter characteristics to be easily obtained without using a complicated circuit such as a digital filter. It is an object. For this purpose, the present invention obtains desired filter characteristics with a simple circuit configuration by converting a time domain function into a frequency domain function and then performing data processing in the frequency domain. Fourier transform and inverse Fourier transform are used to mutually transform between time-domain functions and frequency-domain functions, respectively, and in common cases, methods called fast Fourier transform and fast inverse Fourier transform are used, respectively. It is a well known place.

Furthermore, Fourier transform and inverse Fourier transform are performed on data within a predetermined time, and for data that occurs continuously in time, they are repeatedly performed on the above-mentioned predetermined time period. This period is one of the fundamental waves of the waveform, which is a function of the time domain.
chosen equal to the period. However, if one cycle of the waveform is Fourier transformed to produce a frequency spectrum, then data processing is applied to this frequency spectrum, and then inverse Fourier transform is performed to generate one cycle of the waveform after data processing. There is generally a discontinuity between cycles, and this discontinuity causes noise.

Another object of the present invention is to provide a method in which the above-mentioned discontinuity does not occur, and embodiments of the present invention will be described in detail below with reference to the drawings.

Note that "real number memory" as used in this specification refers to a memory that stores data corresponding to the real part of the real part and imaginary part that constitute the complex number used in this invention, and is generally used in the field of electronic computers. It does not indicate the memory for real numbers in the distinction between real number type and integer type for numerical values.

FIG. 1 is a block diagram showing one implementation of the present invention, in which 1 is a waveform memory, 2 is a filter having a predetermined impulse response g(n), 3 is a fast Fourier transform circuit, and 4 is a block diagram showing a waveform memory in the frequency domain. A register for storing a predetermined transfer function H(k), 5 a fast inverse Fourier transform circuit, 6 a first memory device (hereinafter referred to as
7 is a second memory device (hereinafter abbreviated as RAM 7), 8 is an addition circuit, 9 is a multiplication circuit, 10 is a FIFO that is read in the order of writing.
(first-in-first-out) memory device (FIFO
11 is a switch that equivalently indicates the conversion of the write input to the RAM 6, 110 is its movable contact, 111, 112, and 113 are fixed contacts of the switch 11, and 12 is the conversion of the read output of the RAM 6. 120 is its movable contact, 121, 122, 123 is a switch that equivalently displays
are fixed contacts of the switch 12, 13 is a register that stores the numerical value zero (hereinafter referred to as 0), and 1 is a fixed contact of the switch 12.
4 is an input terminal of a sampling clock for reading out the FIFO 10.

In addition, x _n (n) represents the waveform read from the waveform memory 1, and n is the order of sampling points of the waveform: 0, 1, 2, ......N-1 (the total number of sampling points within one period is N). ), which means that the amplitude of the waveform is expressed as a function of n. Hereinafter, n will be used with the same meaning for other waveforms. Further, m in x _n (n) changes as 0, 1, 2, 3, . . . in the order of the cycles in which Fourier transform and inverse Fourier transform are performed. Therefore, in the embodiment shown in FIG. 1, x _n+1 (n)=x _n (n)
It is. u _n (n) is the first waveform, u _n-1 (N+
n) is the second waveform, v _n (n) is the third waveform, y _n
(n) represents a composite waveform. y _n (l) is the waveform input from the RAM 6 to the fast Fourier transform circuit 3, Y _n
(k) is the frequency spectrum obtained by Fourier transforming the waveform y _n (l), which will be referred to as the first frequency spectrum, and H(k) is the transfer function in the frequency domain, U _n (k)
represents the second frequency spectrum. Y _n (k), H
(k), k in U _n (k) represents the order of sample points on the frequency axis, so k = 0, 1, 2, 3,...
...k-1 (in this case K=2N), meaning that the frequency spectrum is expressed as a function of each harmonic. U _n-1 (N+n)
The meaning of m-1 and N+n of , and l of y _n (l)
The meaning will be explained later.

FIG. 2 is an operation time chart showing the operation of the device shown in FIG. Figure d shows the phase of the transfer from RAM6 to RAM7 (explained in a later section), e shows the phase of the clear phase (explained in a later section), and f shows the phase of the second load stage (explained in a later section). are shown respectively.

3 and 4 are flowcharts showing data processing in the apparatus shown in FIG. 1, and the operation of the embodiment shown in FIG. 1 will be explained below with reference to FIGS. 1 to 4.

When a key-on signal indicating that a key has been pressed on the keyboard of an electronic musical instrument is detected (this related circuit is not shown in FIG. 1), the signals 201 and 202 in FIG.
RAM6 and RAM7 are cleared as shown in
and n are set to an initial value of 0. Next, waveform memory 1
x _n (n) is read from x _n (n) and g(n)
is convolved and the third waveform v _n (n)
is generated as v _n (n)=x _n (n)○*g(n)...(1) (Fig. 3, 203). Although the method in equation (1) is one example of generating the third waveform v _n (n), it is understood that the third waveform v _n (n) may be generated in any other manner. Needless to say. Next, the addition circuit 8 performs the addition of y _n (n) = v _n (n) + u _n (n) + u _{n -1} (N + n) ... (2) (Fig. 3 204) with a period of m = 0. (See FIG. 2), since both RAM6 and RAM7 are cleared, y _n (n)=v _n (n), which is written to the FIFO 10. At that time, the movable contact 110 of the switch 11 is connected to the fixed contact 111, and the composite waveform y _n (n) is simultaneously generated in the RAM
6 is written. The RAM 6 has a storage capacity of 4N words, and its configuration is divided into a first half of real number memory with N words, a second half of real number memory with N words, an imaginary number memory with first half of N words, and a second half of imaginary number memory with N words. As explained in the previous section, y _n (n) is composed of N words (n=
0, 1, ......N-1), are input to the first half of the real number memory of RAM6. This stage is tentatively referred to as a first loading stage (see FIG. 2c and FIG. 3 205).

Following the first load stage, a transfer stage (see FIG. 2d and FIG. 3 206) is performed in which the data in the latter half of the real number memory of RAM 6 is transferred to RAM 7.
At this time, the movable contact 120 of the switch 12 is connected to the fixed contact 123. RAM7 has a capacity of N words and stores the data transferred from the second half of the real number memory of RAM6 until the first load stage of the next cycle. In this sense, the output of RAM7 is u _n-1 (N+
n). In the period m=O
Since the latter half of the real number memory of RAM6 remains cleared, the data input to RAM7 at the cycle of m=O is 0, so when m=1, the data u _n-1 read from RAM7 is (N+1) becomes zero.

Next, the clearing stage shown in FIG. 2e and FIG. 3 207 is performed, and the real number memory second half and the imaginary number memory second half of the RAM 6 are cleared.

Such an operation is n=0, 1,...
...The writing of y _n (n) is completed for N-1. However, it is assumed that the movable contact 110 of the switch 11 is connected to the fixed contact 112 each time in the clear stage.

After writing y _n (n), the movable contact 120 of the switch 12 is connected to the fixed contact 121 and the RAM is
The contents 2N words of the complex number memory 6 are input to the fast Fourier transform circuit 3 and converted into a frequency spectrum Y _n (k) (see 209 in FIG. 3). At this time, Y _n is output from the RAM 6 and processed by the fast Fourier transform circuit 3
Letting the signal converted to (k) be expressed as y _n (l), as is clear from the explanation of writing to RAM 6, y _n (l) is the value of l, 0, 1, 2, etc.
It is composed of 2N words of complex numbers corresponding to each of 2N-1, and in the region of 0l(N-1), y _n (l)=
It represents a waveform in which y _n (n)+j0 is all 0+j0 in the region of Nl(2N-1). Next, the multiplication circuit 9 performs the calculation U _n (k) = H (k) - Y _n (k) (3) (303 in Fig. 4), and then inverts U _n (k) at high speed. It is input to the Fourier transform circuit 5 and subjected to inverse Fourier transform to obtain a signal u _n (l) representing a waveform.The movable contact 110 of the switch 11 is connected to the fixed contact 113 and the RAM is
Write to 6. (See Figure 4 306). RAM6 is also used as a memory device for fast Fourier transform and fast inverse Fourier transform, and for this reason it has an imaginary number memory part, and when the fast Fourier transform is finished, u _n (l) has already been input to RAM6. However, for convenience of explanation, steps 305 and 30 in FIG.
It is divided into 6 parts. FIG. 4 306 is performed in the phase of FIG. 2 f and is referred to as the second loading stage.

After the second loading stage, 1 is added to m (307 in Figure 4) and the next cycle is entered (2 in Figures 4 and 3).
11) The first loading stage, transfer paragraph, clearing stage, and second loading stage are repeated.

The first waveform _un (n) is the waveform read from the first half of the real number memory of RAM 6 in step 204 in FIG. 3, and the second waveform un _-1 (N+n) is the waveform read from RAM 7 in step 204. However, when m=O, U _n (n) is also u _n-1 (N+
n) are both zero, and when m=1, U _n-1 (N
+n) is zero, m≧2, and v _n (n), U
The three waveforms _n (n) and u _n-1 (N+n) are combined to generate a composite waveform y _n (n). In this way, the waveform y _n (n) is synthesized until the key-off state is detected at step 308 in FIG.
is input. Input from terminal 14 and FIFO10
The frequency of the sampling clock for reading out the frequency is set to a value determined by the desired musical tone frequency, and the FIFO 10 is read out continuously by this sampling clock. The frequency of the clock pulses (not shown in the drawing) for the circuit is determined. Writing to the FIFO 10 is performed intermittently, but since this write control circuit is well known in the art, its explanation will be omitted.

The operation of the circuit shown in FIG. 1 is as described above, and the waveform u _n (l) formed by inverse Fourier transform is
The second half of ie l=N, N+1, ......2N-
By adding the part 1 to the part n=0, 1, ......N-1 in the composite waveform y _n+1 (n) after one cycle, the end of the waveform y _n (n), that is, y _n ( N
The discontinuity between the value of -1) and the starting point of the waveform y _n+1 (n), that is, the value of y _n+1 (0), is removed, and the transfer function H(k) in the frequency domain is Therefore, complex filter characteristics can be easily realized, and smooth filter characteristics can be given by the impulse response g(n) in the time domain.

The explanation regarding the RAM 6 will be extracted from the above description to further clarify the configuration and operation of the RAM 6.

The write/read operations of the RAM 6 are as shown in the flowcharts of FIGS. 3 and 4, and the first load stage, transfer stage, and clear stage are performed sequentially for each of N sample points for one cycle of the waveform. . First, the first loading stage is performed for the sample point n=0, and when the sample value y _n (0) of y _n (0) is written to the address “0” of the real number memory of RAM 6, before this write The sample value un(0) of u _n (n) that was written at address "0" in
has been read out and input to the adder circuit 8. Subsequently, in the transfer stage, the sample value u _{n (N) of u n} (N+h) stored at address "N" of the real number memory of RAM 6 (that is, address "0" in the latter half of the real _{number memory} ) is read and stored in RAM 7. Stored at address "0". After this, at the clearing stage, the RAM
6 real number memory address “N” has data “0”
is written. Thereafter, the above processing is sequentially performed for each sample point n=1, 2, . . . N-1. For each sample point from n=0 to N-1, when the above processing is completed, the memory contents u _n (N+n) of the latter half of the real number memory of RAM6 (addresses N to 2N-1) are transferred to and stored in RAM7. At the same time, the memory contents are cleared, and the adder circuit 8
One cycle of the new waveform y _n (n) obtained from y n (n) is stored.

Here, the reason why the real number memory part of the RAM 6 has a storage capacity of 2N words (2 cycles) consisting of the first half and the second half is because the composite waveform y _n (n) obtained from the adder circuit 8 In order to remove the discontinuity of each cycle, the Fourier transform and inverse Fourier transform in transform circuits 3 and 5 are
The waveform u _n (l) of 2N words (2 cycles) obtained by inverse Fourier transform is performed using 2N words as a unit.
This is because the data is written to the real number memory of RAM6.

Then, the waveforms u _n (0) to u _n stored in the first half of the real memory of RAM 6 (addresses 0 to N-1)
(N-1) is read out in the first loading stage and supplied to the adder circuit 8, and the waveforms u _n (N) to u stored in the second half of the real number memory (addresses N to 2N-1)
_n (2N-1) is read out during the transfer stage and supplied to the adder circuit via the RAM 7 in the next cycle (m+1).

As far as this kind of operation is concerned, RAM 6 only needs to have a capacity of 2N words in the real number memory section, but RAM 6 is an intermediate memory for fast Fourier transform circuit 3 and fast inverse Fourier transform circuit 5 to perform transform operations. It is also used as A real number memory section is used as intermediate memory for these operations.
For 2N words, 2N words of imaginary number memory are required. RAM via contact 121 to fast Fourier transform circuit 3
y _n (l) input from 6 is the value of l 0, 1, 2,...
...consists of 2N words of complex numbers (i.e. 4N words of data) corresponding to each of 2N-1, and 0l
In the region of (N-1), y _n (l) = y _n (n) + j0, and in the region of Nl (2N-1), y _n (l) = 0 for all
+j0. Such y _n (l) is not actually read out from the RAM 6 and input somewhere, but is stored in the RAM 6 and is calculated by the fast Fourier transform circuit 3, and the data changes sequentially until the end. It can be considered that data in the form of Y _n (k) is read from the RAM 6 and input to the multiplier circuit 9.

In the same sense, from the fixed contact 113
Although it is expressed as u _n (l) (4N words) input to the RAM 6, it actually means that the content of the RAM 6 is u _n (l) when the fast inverse Fourier transform is completed.

It goes without saying that the impulse response g(n) and/or the transfer function H(k) can be further modulated by signals such as touch control signals, tone tablet signals, etc., or according to a predetermined program related to the key-on signal. Nor.

In addition, in this invention, the waveform memory output x _n
(n) is the initial waveform (m=0, n=0, 1,
2,......N-1) only, and when m≧1, various waveform values in the subsequent stage, such as y _n (n), u _n (l), y _n (l), or U _n (n), are used. You can do it like this. In this case, the waveform memory can be extremely small-scale and economical, and it goes without saying that even with this configuration, an output waveform that changes sequentially over time can be obtained.

As is clear from the above description, according to the present invention, the important part of the data processing for forming musical waveforms is performed in the frequency domain, so that desired filter characteristics can be obtained using a simple circuit. Furthermore, it is possible to form a musical sound waveform in which no discontinuity occurs in the time domain signal when converting the frequency domain signal to the time domain signal.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an operation time chart showing the operation of the device shown in FIG. 1, and FIGS. 3 and 4 show data processing in the device shown in FIG. This is a flowchart. DESCRIPTION OF SYMBOLS 1... Waveform memory, 2... Filter, 3... Fast Fourier transform circuit, 4... Register, 5... Fast inverse Fourier transform circuit, 6... First memory device, 7... Second memory device , 8...addition circuit,
9...Multiplication circuit, 10...FIFO memory device.

Claims (1)

[Scope of Claims] 1. A first loading step of forming a desired first waveform and writing this first waveform into the first half of the real memory of the first memory device; A transfer step of transferring the data in the second half of the real memory of the memory device to the second memory device, and after this transfer step, all the data is transferred to the second half of the real memory, the first half of the imaginary memory, and the second half of the imaginary memory of the first memory device. a clearing step of writing a numerical value of zero, and a step of reading out data in the first half of the real number memory and the second half of the real number memory of the first memory device after the clearing step, and performing Fourier transform on the data to generate a first frequency spectrum; A step of calculating a predetermined transfer function in the frequency domain on this first frequency spectrum to form a second frequency spectrum, and performing an inverse Fourier transform on this second frequency spectrum to generate a second waveform. A second memory to be written to the first half of the real number memory and the second half of the real number memory of the first memory device.
A waveform read from the first half of the real number memory of the first memory device by sequentially and cyclically repeating the loading stage, the first loading stage, the transferring stage, the clearing stage, and the second loading stage at a predetermined period; inputting a composite waveform obtained by synthesizing the waveform read from the second memory device into a third memory device read out in writing order; generating a musical sound waveform having a fundamental frequency related to the frequency of the sampling clock. 2. In the method of forming a musical sound waveform according to claim 1, the first waveform is a convolution of a digital code representing a waveform read from a waveform memory and a digital code representing an impulse response with desired characteristics. A method for forming a musical sound waveform, characterized in that the formation is performed by calculation.