JPS61169024A - Analog output processing system - Google Patents

Abstract

PURPOSE:To obtain an output with high accuracy with simple circuit constitution by transmitting externally an output of an integration device and inputting it to an A/D converter and controlling the output so as to be an object value thereby obtaining an analog signal. CONSTITUTION:An operating section 2 and the A/D converter 1 are started by sample pulses at times t1,t2... at a prescribed period. A converted value (x) of the converter 1 is smaller than an internal data (y) at a time t1 at first and the operating section 2 brings digital outputs O1,O2 to logical '1'. Thus, a capacitor C of the integration device 4 is charged by a time constant decided by C.R1 through a resistor R1 and an output voltage Z is shown in broken lines. The converted (x) is equal to the internal data (y) at a time t2, the operating device 2 brings the output O1 to logical '0' and the output O2 to logical '1' to keep the internal state. The converted value (x) becomes larger than the data (y) at a time t4 and the operation section 2 brings the outputs O1,O2 both to logical '0', then the capacitor C is discharged by a time constant of CR2 and the output voltage falls down. Then, the internal data 3 is outputted as an object value.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an analog output processing method, particularly an analog output processing method that performs a relatively slow and simple digital/analog conversion output in a microcomputer device, etc. It is related to the method.

[Conventional technology and problems]

For example, when controlling various devices with a microcomputer, it may be necessary to output internal data held as digital information as an analog signal.

4 and 5 show examples of conventional analog output processing methods.

FIG. 4 shows a circuit for performing digital/analog (D/A) conversion of a so-called resistance ladder set. In the figure, 5 represents an amplifier and 6 represents an analog output terminal. According to this method, a digital output corresponding to the desired resolution is required, the number of output bits increases, the device becomes relatively complex, and when updating the digital output, the analog output terminal 6
There are problems in that glitches are likely to occur in the analog output of the device, and noise is likely to appear in the change period of the digital output.

The circuit shown in FIG. 5 is of a so-called variable duty type. The resistor R and capacitor C determine the charging/discharging time constant, and an analog output corresponding to the pulse width of the digital output is obtained.

According to this method, one circuit configuration can be made easily.

There are problems in that the ripple is large and digital output must be performed in short cycles.

Means for Solving Problem C] The present invention aims to solve the above problems and is an analog output processing method suitable for a system using a microcomputer, which can be realized with a simple circuit and is easy to control. provide a method. In other words, the analog output processing method of the present invention is A.
/D converter.

The device includes an integrator that performs analog output, and an arithmetic unit using a digital processing device that compares a digital signal taken in from the A/D converter with a target value and controls two digital outputs, the device having one of the digital signals. The output is configured to control the charging of the integrator, and the other digital output is configured to control the discharging of the integrator, and the output of the integrator is output to the outside and is also sent to the A/D converter. It is characterized in that it is connected to the input of the digital processing device and outputs internal data, which is a target value held by the digital processing device, in analog form. An embodiment will be described below with reference to one drawing.

〔Example〕

FIG. 1 shows the configuration of an embodiment of the present invention, FIG. 2 is a diagram illustrating processing control by the arithmetic unit shown in FIG. 1, and FIG. 3 is a time chart showing the operation of the embodiment shown in FIG. 1.

In the figure, numeral 1 is an A/D converter, 2 is an arithmetic unit using a microprocessor, 3 is an internal data storage unit that holds internal data serving as a target value, and 4 is an A/D converter, 4 is connected to resistors R1, R2, diodes Di, D2, and capacitor C. It consists of an integrator, and 5 is an amplifier.

6 represents an analog output terminal.

The arithmetic unit 2 is made up of eight microprocessors, for example.

The processing shown in FIG. 2 is executed.

The output of the integrator 4 is determined by the two digital outputs 01.02 from the calculation unit 2, and the output of the integrator 4 is outputted to an external device via the amplifier 5, and is also input to the A/D converter l. It has become so.

The calculation unit 2 calculates internal data y prepared in the internal data storage unit 3 within the A/D conversion value by the A/D converter 1 through the process 10 shown in FIG. 2 for each predetermined sample pulse.
Compare with. This internal data y is a digital value that is a target value of the output, and normally changes over one hour. When the A/D conversion conversion value internal data y is smaller than the A/D conversion conversion value internal data y, the calculation unit 2 outputs 1'' to both digital outputs O1 and 02 through process 11. Also, when the A/D conversion conversion value internal data y is equal to In this case, processing 12 outputs "0" to digital output 01 and "1" to digital output 02.

If the A/D conversion value is larger than the internal data y, "0" is output to both digital outputs 01 and 02 in process 13. When 1'' is output to digital output 01, capacitor C is charged, and when 0'' is output to digital output 02, capacitor C is discharged.

Next, follow the time chart shown in FIG.

The operation of the embodiment shown in FIG. 1 will be explained.

The A/D converter 1 and the calculation unit 2 generate sample pulses tl, t2 . It is activated by t3...

1) When tl, the A/D conversion value is smaller than the internal data y. Therefore, the calculation unit 2 sets the digital outputs 01 and o2 to "1" by the process 11 shown in FIG. Thereby, the capacitor C of the integrator 4 is connected through the resistor R1 with a time constant determined by C and R1.
It will be charged, and its output voltage 2 will rise as shown by the broken line in FIG.

1i) At t2, the A/D conversion value becomes equal to the internal data y, and the calculation unit 2 sets the digital output 01 to "0" and the digital output 02 to "1" by the second circle illustration process 12. . Due to this.

The two diodes DI and D2 shown in FIG. 1 are both cut off, and the charge on the capacitor C remains unchanged. Therefore, the output voltage 2 also does not change, resulting in a so-called steady state.

1ii) When R3, maintain steady state as in R2.

1v) At R4, internal data y has changed.

The A/D conversion value is larger than the internal data y.

Therefore, the calculation unit 2 sets both the digital outputs 01 and 02 to "0" by the process 13 shown in FIG. As a result, capacitor C is discharged with a time constant determined by the capacitance of C and R2. Therefore,
Output voltage 2 falls.

v) When R5, the output voltage 2 decreases as in the case of R4.

vi) When R6 and R7, R3 and R4 respectively
The steady state is maintained as in the case of .

〔Effect of the invention〕

As explained above, the present invention has the following effects.

(2) Since the circuit configuration is simple and the processing control is also simple, the processing load on, for example, a microprocessor is light, and other controls besides analog output can be processed in parallel.

■ Resolution and accuracy equivalent to that of an A/D converter can be ensured.

■ There is no beam pull in steady state.

■ Glitches do not occur because the integrator absorbs changes in the digital output port.

[Brief explanation of drawings]

FIG. 1 shows the configuration of an embodiment of the present invention, FIG. 2 is a diagram explaining processing control by the calculation unit shown in FIG. 1, FIG. 3 is a time chart showing the operation of the embodiment shown in FIG. 1, and FIG. 4 and the fifth
The figure shows an example of a conventional analog output processing method. In the figure, ■ is an A/D converter, 2 is an arithmetic unit, 3 is an internal data storage unit, 4 is an integrator, and 5 is an amplifier. 6 represents an analog output terminal. Patent applicant: Fujitsu Ltd. Representative Patent Attorney Hiroshi Mori 1) (and 1 other person) Figure 1

Claims (1)

[Claims] The apparatus includes an A/D converter, an integrator that performs analog output, and an arithmetic unit using a digital processing device that compares a digital signal taken in from the A/D converter with a target value and controls two digital outputs. hand,
One of the digital outputs is configured to perform charging control on the integrator, and the other digital output is configured to perform discharging control on the integrator, and the output of the integrator is output to the outside, and the A An analog output processing method characterized in that the digital processing device is connected to be input to a D/D converter and outputs internal data as a target value held by the digital processing device in analog form.