JPS61168990A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPS61168990A
JPS61168990A JP845485A JP845485A JPS61168990A JP S61168990 A JPS61168990 A JP S61168990A JP 845485 A JP845485 A JP 845485A JP 845485 A JP845485 A JP 845485A JP S61168990 A JPS61168990 A JP S61168990A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
board
mounting
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP845485A
Other languages
Japanese (ja)
Inventor
土居 和正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP845485A priority Critical patent/JPS61168990A/en
Publication of JPS61168990A publication Critical patent/JPS61168990A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はVTR等の電子機器における高密度実装を実現
するためのプリント回路基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printed circuit board for realizing high-density packaging in electronic equipment such as a VTR.

(従来の技術) 近年、オーディオ、ビデオ機器に代表される家庭用電子
機器の小型化が急速に進む中で、IC、チップ抵抗、チ
ップコンデンサー等の小型電子部品の開発がおこなわれ
、これを集めていかにコンパクトに回路実装し、装置の
小型化を実現するかが課題となっている。これら装置の
小型化を実現するための回路実装配線板および、実装方
法を従来例について説明する。
(Conventional technology) In recent years, as home electronic devices such as audio and video equipment have rapidly become smaller, small electronic components such as ICs, chip resistors, and chip capacitors have been developed. The challenge is how to compactly mount the circuit and realize miniaturization of the device. A conventional example of a circuit mounting wiring board and a mounting method for realizing miniaturization of these devices will be described.

第4図(a)、(b)はそれぞれ従来の回路実装配線板
の平面図および側面図であり、第5図は従来の実装方法
を示す断面図である。第4図において、1はポリイミド
など可撓性を有する絶縁層、2は接着材を塗布した導電
層、3は絶縁層1と導電層2を圧接したフレキシブル配
線板、4はフレキシブル配線板3を固定する補強板、5
はフレキシブル配線板3と補強板4を接合する接着層、
6は絶縁層1、導電層2、配線板3、補強板4および接
着層5で構成するプリント回路基板である。
4(a) and 4(b) are a plan view and a side view, respectively, of a conventional circuit mounting wiring board, and FIG. 5 is a sectional view showing a conventional mounting method. In FIG. 4, 1 is an insulating layer having flexibility such as polyimide, 2 is a conductive layer coated with an adhesive, 3 is a flexible wiring board in which the insulating layer 1 and the conductive layer 2 are pressed together, and 4 is the flexible wiring board 3. Reinforcing plate to fix, 5
is an adhesive layer that joins the flexible wiring board 3 and the reinforcing board 4;
6 is a printed circuit board composed of an insulating layer 1, a conductive layer 2, a wiring board 3, a reinforcing plate 4, and an adhesive layer 5.

第5図において1回路の実装密度の高密度化の方法とし
てシリコンチップIC(集積回路)にみられるように、
平面のシリコンチップ上にいかに小型の電子部品を構成
するかという平面上の高密度化の取組みがあるが、電子
機器の場合は平面的な実装に対して立体的な実装によっ
て全体的に小型化を図っている。このため回路基板の実
装も、平面的に実装することに対してこれを垂直方向に
たてて実装することに高密度化を実現する。この垂直方
向の実装方法として、回路基板の折り曲げ実装が一般的
である。この折り曲げを可能とするため屈曲性に対して
強い第4図に示すように構成されたフレキシブル配線板
3を用い、この表面の導電層をフォトエツチングによっ
て回路パターンを形成し電子部品を実装し1つの信号処
理機能を有する回路を形成する。これら回路を一体のフ
レキシブル配線板3の上に複数個配置しこれを結んで1
つのユニットとする。補強板4はフレキシブル配線板3
への部品実装をおこなうための補強部材であり、第5図
に示すように折り曲げ実装をするための補強部材として
使用されていた。この補強部材は折り曲げるため2個に
分離し間隔は折り曲げ時にフレキシブル配線板のストレ
ス軽減するため、回路基板6の厚さの2倍以上の距離を
あける必要がある。また折り曲げ性および強度を保つた
め配線板3上の回路間の結合は折り曲げ部を、折り曲げ
に対して直角方向の平行パターンにする必要がある。こ
のように第5図に示す折り曲げ実装をすることにより折
り曲げの両側に部品が実装され高さ方向を有効利用する
ため実装密度は向上する。
As shown in Figure 5, as a method for increasing the packaging density of one circuit, as seen in silicon chip ICs (integrated circuits),
Efforts are being made to increase the density of small electronic components on a flat silicon chip, but in the case of electronic devices, overall miniaturization is achieved through three-dimensional mounting rather than flat mounting. We are trying to Therefore, when mounting circuit boards, higher density can be achieved by vertically mounting them, rather than flatly mounting them. As a mounting method in this vertical direction, folding the circuit board is commonly used. In order to make this bending possible, a flexible wiring board 3 having a structure as shown in FIG. form a circuit with two signal processing functions. A plurality of these circuits are arranged on a single flexible wiring board 3 and connected together.
one unit. Reinforcement board 4 is flexible wiring board 3
This is a reinforcing member for mounting components on the board, and as shown in FIG. 5, it was used as a reinforcing member for folding and mounting. This reinforcing member is separated into two parts for bending, and the distance between them must be at least twice the thickness of the circuit board 6 in order to reduce stress on the flexible wiring board during bending. Furthermore, in order to maintain bendability and strength, the connections between the circuits on the wiring board 3 need to have bent portions formed in a parallel pattern in a direction perpendicular to the bending. By performing the folding mounting shown in FIG. 5 in this manner, components are mounted on both sides of the fold, and the height direction is effectively utilized, so that the mounting density is improved.

(発明が解決しようとする問題点) 上記のような従来の構成では (1)  折り曲げ実装する必要からポリイミド等の高
価な材質を使用することにより回路基板が高価なものに
なる。
(Problems to be Solved by the Invention) In the conventional configuration as described above, (1) the necessity of bending and mounting makes the circuit board expensive due to the use of expensive materials such as polyimide;

(2)  回路基板の製造工程において、ポリイミドと
導電層の貼り合せ、ポリイミド配線板と補強板の貼り合
せというように貼り合せ工程が多く、その分だけ工程が
複雑となる。
(2) In the manufacturing process of a circuit board, there are many bonding steps such as bonding polyimide and a conductive layer, and bonding a polyimide wiring board and a reinforcing plate, and the process becomes complicated accordingly.

(3)エツチングされたフレキシブル配線板と補強板の
貼り合せは上記したように同時にはできないので後工程
となる。このため、補強板の外形とフレキシブル配線板
の外形の位置合せの精度を必要とし、作業が困難となっ
ている。
(3) Since the etched flexible wiring board and the reinforcing plate cannot be attached at the same time as described above, this is a post-process. For this reason, the outer shape of the reinforcing plate and the outer shape of the flexible wiring board must be precisely aligned, making the work difficult.

以上のことから全体として高価な回路基板となっている
Due to the above reasons, the circuit board is expensive as a whole.

(問題点を解決するための手段) 上記問題を解決するために本発明のプリント回路基板は
、エポキシ等の絶縁部材に可撓性を有する接着層を厚さ
20μ■以上上の均一な厚さで形成し、その上に回路パ
ターンの導電層を形成した回路基板の絶縁部材の一部を
テーバ状に取り除き。
(Means for Solving the Problems) In order to solve the above problems, the printed circuit board of the present invention has a flexible adhesive layer formed on an insulating material such as epoxy to a uniform thickness of 20μ or more. A portion of the insulating material of the circuit board, on which the conductive layer of the circuit pattern is formed, is removed in a tabular shape.

テーバ折り曲げを軸として折り曲げ実装を可能とする構
成を備えたものである。
It has a configuration that enables folding and mounting around Taber bending.

(実施例) 本発明の実施例のプリント回路基板について、第1図な
いし第3図に基づいて説明する。第1図(a) 、 (
b)はそれぞれ本発明の一実施例であるプリント回路基
板の構成を示す平面図および側面図である。同図におい
て11は紙フェノール、エポキシ等の硬質絶縁基板、1
2は硬質絶縁基板11に設けたテーパ溝、13は銅薄膜
等のエツチング加工可能な導電体、14は上記導電体と
硬質絶縁基板を接合する屈曲に耐える可撓性を有するB
Tレヂン系の軟質接着材を用いた接着層、15は硬質絶
縁基板11、テーパ溝12、導電体13.接着層14で
構成したプリント回路基板、16は回路両端の端子部、
17は回路間を結ぶ平行パターンである。
(Example) A printed circuit board according to an example of the present invention will be described based on FIGS. 1 to 3. Figure 1(a), (
b) is a plan view and a side view, respectively, showing the structure of a printed circuit board that is an embodiment of the present invention. In the figure, 11 is a hard insulating substrate such as paper phenol or epoxy;
2 is a tapered groove provided in the hard insulating substrate 11; 13 is a conductive material that can be etched, such as a copper thin film; and 14 is B, which is flexible enough to withstand bending when joining the conductive material and the hard insulating substrate.
An adhesive layer 15 is made of a T resin-based soft adhesive, a hard insulating substrate 11, a tapered groove 12, a conductor 13. A printed circuit board composed of an adhesive layer 14, 16 terminals at both ends of the circuit,
17 is a parallel pattern connecting the circuits.

以上のような構成のプリント回路基板においては、製造
工程における貼り合せ工程は、接着材14を絶縁基板1
1.または導電体13に塗布したものを合わせて圧力を
かけて貼り合せる。1工程で回路基板を完成させること
ができる。プリント回路基板15の導電体13をフォト
エツチングによって部分的に取り除き、回路パターンを
形成する。この回路パターンにチップ抵抗、チップコン
デンサー。
In the printed circuit board having the above configuration, the bonding process in the manufacturing process involves applying the adhesive 14 to the insulating substrate 1.
1. Alternatively, the materials applied to the conductor 13 are combined and bonded together by applying pressure. A circuit board can be completed in one step. The conductor 13 of the printed circuit board 15 is partially removed by photoetching to form a circuit pattern. Chip resistor and chip capacitor are included in this circuit pattern.

IC等の電子部品を実装し、1つの電気信号を処理する
回路を形成する。このような回路を1枚のプリント回路
基板15上に複数個配置しそれらを有機的に結合し1つ
の機能を有する機能回路を形成する。またプリント回路
基板15の両端には第2図に示すようにメインP板18
に折り曲げ実装し、メイン基板に半田接続して回路機能
を動作させるために、信号の授受を行なう端子部16を
形成する。
Electronic components such as ICs are mounted to form a circuit that processes one electrical signal. A plurality of such circuits are arranged on one printed circuit board 15 and organically combined to form a functional circuit having one function. In addition, main P plates 18 are provided at both ends of the printed circuit board 15 as shown in FIG.
A terminal portion 16 for transmitting and receiving signals is formed in order to fold and mount the circuit board and connect it to the main board by soldering to operate the circuit function.

また上記回路間の結合は回路基板15の折り曲げ部の導
電体13にエツチングを施して残した平行パターン17
で行なう。接着層14は導電体13のエツチングによっ
ても除かれないので、導電体が除かれたのちでも硬質絶
縁体をおおい、またエツチング導体をねじり等の外的ス
トレスから守る保護膜を形成する。しかも材質的に可撓
性を有するBTレヂン系の材料であるため、硬質絶縁基
板11を屈曲させた場合、接着が硬質絶縁基板11につ
いているので。
Further, the connection between the circuits is achieved by etching the conductor 13 at the bent portion of the circuit board 15 and leaving a parallel pattern 17.
Let's do it. Since the adhesive layer 14 is not removed by etching the conductor 13, it forms a protective film that covers the hard insulator even after the conductor is removed and protects the etched conductor from external stresses such as twisting. Moreover, since the material is a flexible BT resin material, when the hard insulating substrate 11 is bent, the adhesive remains on the hard insulating substrate 11.

直接導体に屈曲のストレスがかかるのを防ぎ、回路基板
15としての屈曲を実現する。硬質絶縁基板11は導電
体13の補強部材として働く。また硬質絶縁基板11に
設けたテーパ溝12によって、回路基板15は少しの力
でテーパ溝12を軸にして折り曲がり折り曲げ実装が可
能となる。このテーパ溝12は平行パターン17を横断
するように、しかも回路基板15の中央部に設け、折り
曲げ時の平行パターン17のストレスを軽減し、また回
路基板15の端子高さを一致させる。また硬質絶縁基板
11のテーパ溝12の数を増すことにより第3図(a)
、(b)に示すようにテーパ1本当りの折り曲げ曲率が
小さくなり。
It is possible to prevent bending stress from being applied directly to the conductor and realize bending as a circuit board 15. The hard insulating substrate 11 serves as a reinforcing member for the conductor 13. Furthermore, the tapered groove 12 provided in the hard insulating substrate 11 allows the circuit board 15 to be bent and mounted around the tapered groove 12 with little force. The tapered groove 12 is provided in the center of the circuit board 15 so as to cross the parallel pattern 17, thereby reducing stress on the parallel pattern 17 during bending and matching the terminal heights of the circuit board 15. Furthermore, by increasing the number of tapered grooves 12 in the hard insulating substrate 11, as shown in FIG.
, as shown in (b), the bending curvature per taper becomes smaller.

曲げによる導電体へのストレスを少なくすることができ
る。またテーパ溝加工について後加工を行なっても同様
の効果を得る。
Stress on the conductor due to bending can be reduced. Further, similar effects can be obtained even if post-processing is performed for tapered groove processing.

以上のように本実施例によれば、テーパ溝加工を施した
絶縁基板に可撓性を有する接着層を介して導電体を設け
ることにより高価なポリイミド等の可撓性の配線板を使
用することなく折り曲げ実装を可能とし高密度回路実装
を可能とすることができる。   − (発明の効果) 本発明によれば、硬質プリント板を折り曲げるためポリ
イミド配線を使用した回路基板に比べて。
As described above, according to this embodiment, a conductor is provided on an insulating substrate with a tapered groove through a flexible adhesive layer, thereby making it possible to use a flexible wiring board made of expensive polyimide or the like. It is possible to perform folding mounting without any bending, and to enable high-density circuit mounting. - (Effects of the Invention) According to the present invention, compared to a circuit board using polyimide wiring for bending a rigid printed board.

補強板を貼り合せる必要がなく、製造工程を簡略化でき
るし、また絶縁基板に設けたテーパ溝と可撓性接着層に
よって硬質基板が折り曲げ実装を可能とし回路基板の原
価を下げることができるなどの実用上のすぐれた効果が
ある。
There is no need to attach a reinforcing plate, which simplifies the manufacturing process, and the tapered grooves provided on the insulating board and flexible adhesive layer allow the rigid board to be bent and mounted, reducing the cost of the circuit board. It has excellent practical effects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a) j (b)はそれぞれ本発明の一実施例
のプリント回路基板の平面図および側面図、第2図は1
本発明の回路基板の実装方法の断面図、第3図は、他の
テーバ加工した絶縁基板の側面図、第4図(a)、(b
)はそれぞれ従来のプリント回路基板の平面図および側
面図、第S図は、従来のプリント回路基板の実装方法の
断面図である。 1 ・・・絶縁層、 2・・・導電層、 3 ・・・フ
レキシブル配線板、4 ・・・補強板、5.14・・・
接着層、6.15・・・プリント回路基板、11・・・
硬質絶縁基板、12・・・テーバ溝、13・・・導電体
、16・・・端子部、17・・・平行パターン、18・
・・メインP板。 特許出願人 松下電器産業株式会社 第1図 14−一一優(肩 第2図 18−  メインPffi 第4図 (a) 0ぐ− (V′)ぐ−
1(a) and 1(b) are respectively a plan view and a side view of a printed circuit board according to an embodiment of the present invention, and FIG.
A cross-sectional view of the circuit board mounting method of the present invention, FIG.
) are respectively a plan view and a side view of a conventional printed circuit board, and FIG. S is a sectional view of a conventional printed circuit board mounting method. 1... Insulating layer, 2... Conductive layer, 3... Flexible wiring board, 4... Reinforcement plate, 5.14...
Adhesive layer, 6.15... Printed circuit board, 11...
Rigid insulating substrate, 12... Taber groove, 13... Conductor, 16... Terminal portion, 17... Parallel pattern, 18...
...Main P board. Patent applicant Matsushita Electric Industrial Co., Ltd. Fig. 1 14-11 (Shoulder Fig. 2 18- Main Pffi Fig. 4 (a) 0gu- (V')gu-

Claims (1)

【特許請求の範囲】[Claims] 硬質絶縁基板に接着材層を介して導電体を圧着し、表面
の導電層にエッチングをほどこして回路網パターンを形
成した片面または両面プリント回路基板において、前記
接着材に可撓性を有する材料で形成し、前記回路網の電
気的結合のため配置した平行直線パターン部の裏面にあ
たる絶縁基板に前記平行直線パターンを横断する方向に
少なくとも1本のテーパ溝を形成したことを特徴とする
プリント回路基板。
In a single-sided or double-sided printed circuit board in which a conductor is pressure-bonded to a hard insulating substrate via an adhesive layer and a circuit network pattern is formed by etching the conductive layer on the surface, the adhesive is made of a flexible material. A printed circuit board characterized in that at least one tapered groove is formed in a direction that crosses the parallel linear pattern on an insulating substrate that is on the back side of the parallel linear pattern portion formed and arranged for electrical connection of the circuit network. .
JP845485A 1985-01-22 1985-01-22 Printed circuit board Pending JPS61168990A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP845485A JPS61168990A (en) 1985-01-22 1985-01-22 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP845485A JPS61168990A (en) 1985-01-22 1985-01-22 Printed circuit board

Publications (1)

Publication Number Publication Date
JPS61168990A true JPS61168990A (en) 1986-07-30

Family

ID=11693572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP845485A Pending JPS61168990A (en) 1985-01-22 1985-01-22 Printed circuit board

Country Status (1)

Country Link
JP (1) JPS61168990A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6375074U (en) * 1986-11-04 1988-05-19
JP2011014809A (en) * 2009-07-06 2011-01-20 Nec Access Technica Ltd Stack type circuit board and method of manufacturing the same
JP2020105884A (en) * 2018-12-28 2020-07-09 鹿島建設株式会社 Timbering demolition method
WO2022130980A1 (en) * 2020-12-14 2022-06-23 日立Astemo株式会社 Semiconductor device, and method for manufacturing same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6375074U (en) * 1986-11-04 1988-05-19
JP2011014809A (en) * 2009-07-06 2011-01-20 Nec Access Technica Ltd Stack type circuit board and method of manufacturing the same
JP2020105884A (en) * 2018-12-28 2020-07-09 鹿島建設株式会社 Timbering demolition method
WO2022130980A1 (en) * 2020-12-14 2022-06-23 日立Astemo株式会社 Semiconductor device, and method for manufacturing same

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