JPS61167695U - - Google Patents
Info
- Publication number
- JPS61167695U JPS61167695U JP1985052247U JP5224785U JPS61167695U JP S61167695 U JPS61167695 U JP S61167695U JP 1985052247 U JP1985052247 U JP 1985052247U JP 5224785 U JP5224785 U JP 5224785U JP S61167695 U JPS61167695 U JP S61167695U
- Authority
- JP
- Japan
- Prior art keywords
- screen
- screen memory
- display device
- graphic display
- memories
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 13
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Digital Computer Display Output (AREA)
- Image Generation (AREA)
Description
第１図はこの考案の一実施例によるグラフイツ
クデイスプレイ装置を示す図、第２図は従来のグ
ラフイツクデイスプレイ装置を示す図である。
図中、１は画面メモリａ、７は画面メモリｂ、
１０は画面表示用アドレス、１１はセレクタｃ、
１４は画面メモリｃ、１５は画面メモリ状態信号
、１６はセレクタｄ、１７はセレクタｅ、１８は
エンコーダ、１９はセレクタｆ、２０はセレクタ
ｇ、２１はセレクタｈ、２２はセレクト条件信号
、２３は画面メモリクリア用アドレス、２４は画
面メモリ書込み用アドレス、２５はセレクタｉ、
２６は画面メモリ書込み用データ、２７はセレク
タｊ。なお、図中、同一符号は同一又は相当部分
を示す。
FIG. 1 is a diagram showing a graphic display device according to an embodiment of this invention, and FIG. 2 is a diagram showing a conventional graphic display device. In the figure, 1 is screen memory a, 7 is screen memory b,
10 is a screen display address, 11 is a selector c,
14 is a screen memory c, 15 is a screen memory status signal, 16 is a selector d, 17 is a selector e, 18 is an encoder, 19 is a selector f, 20 is a selector g, 21 is a selector h, 22 is a selection condition signal, 23 is a Address for clearing screen memory, 24 is address for writing screen memory, 25 is selector i,
26 is data for writing to the screen memory, and 27 is a selector j. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
図形情報を表示するグラフイツクデイスプレイ装
置において、上記画面メモリを少なくとも３系統
備え、これら各画面メモリが画面メモリへのデー
タの書き込み動作、画面メモリからのデータの読
み出し動作、及び画面メモリのデータのクリア動
作をそれぞれ並行して行ない得るように上記各画
面メモリに対して上記各動作信号を連続的に切換
えて選択付与する選択制御回路を設けたことを特
徴とするグラフイツクデイスプレイ装置。 Characters through screen memory corresponding to display pixels,
A graphic display device for displaying graphical information includes at least three systems of screen memories, each of which performs operations for writing data to the screen memory, reading data from the screen memory, and clearing data in the screen memory. A graphic display device characterized in that a selection control circuit is provided for sequentially switching and selectively applying each of the operation signals to each of the screen memories so that the operations can be performed in parallel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985052247U JPS61167695U (en) | 1985-04-09 | 1985-04-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985052247U JPS61167695U (en) | 1985-04-09 | 1985-04-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61167695U true JPS61167695U (en) | 1986-10-17 |
Family
ID=30572029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985052247U Pending JPS61167695U (en) | 1985-04-09 | 1985-04-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61167695U (en) |
-
1985
- 1985-04-09 JP JP1985052247U patent/JPS61167695U/ja active Pending
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