JPS6116514A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6116514A JPS6116514A JP13760584A JP13760584A JPS6116514A JP S6116514 A JPS6116514 A JP S6116514A JP 13760584 A JP13760584 A JP 13760584A JP 13760584 A JP13760584 A JP 13760584A JP S6116514 A JPS6116514 A JP S6116514A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- diffusion region
- diffusion
- opening
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000009792 diffusion process Methods 0.000 claims abstract description 37
- 238000005530 etching Methods 0.000 claims abstract description 12
- 150000004767 nitrides Chemical class 0.000 claims abstract description 11
- 239000012535 impurity Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 abstract description 8
- 230000003647 oxidation Effects 0.000 abstract description 6
- 238000007254 oxidation reaction Methods 0.000 abstract description 6
- 239000010407 anodic oxide Substances 0.000 abstract description 5
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000008151 electrolyte solution Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010985 leather Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- WYXIGTJNYDDFFH-UHFFFAOYSA-Q triazanium;borate Chemical compound [NH4+].[NH4+].[NH4+].[O-]B([O-])[O-] WYXIGTJNYDDFFH-UHFFFAOYSA-Q 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体装置の製造方法に関し、特に半導体装置
の拡散領域め高精度形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a diffusion region of a semiconductor device with high precision.
（従来の技術）
従来、半導体素子形成時には、一般的に熱酸化膜が拡散
領域形成時の絶縁膜として使用されているＯ
トランジスタ、ＩＣ等では拡散領域の形成が複数回実施
される。従って、拡散領域の間隔（精度）が問題となる
場合がある。この対策として拡散領域形成のだめの選択
的窓開は工程での精度を向上させるべく種々の手段がと
られてきた。特にこの目的のため高精度百合露光機等が
使用されている。(Prior Art) Conventionally, when forming a semiconductor element, the formation of the diffusion region is performed multiple times in O2 transistors, ICs, etc., in which a thermal oxide film is generally used as an insulating film when forming the diffusion region. Therefore, the spacing (accuracy) of the diffusion regions may become a problem. As a countermeasure to this problem, various measures have been taken to improve the precision of the selective window opening in the formation of the diffusion region. In particular, a high-precision Yuri exposure machine or the like is used for this purpose.
しかしながら、高精度百合露光機は処理能力が少ないと
いう欠点があると共に装置が高価であるという問題点を
含んでいる。また高精度百合露光機を用いても目合せ回
数が多くなったシ、その後の工程のプロセスの誤差が太
きいときはその目的を十分達成することができない０
（発明の目的）
本発明の目的は、上記欠点を除去し、処理能力を低下さ
せることなく、かつ比較的容易に自己整合的方法によｌ
ｓ＋精度の拡散領域を形成する半導体装置の製造方法を
提供することにある０（発明の構成）
本発明の半導体装置の製造方法は、半導体基板上に形成
された該半導体の第１の酸化膜に選択的に開口部を形成
する工程と、前記開口部の該酸化膜に傾斜を有するよう
エツチングする工程と、前記傾斜を有する酸化膜の開口
部を通して不純物を拡散し第１の拡散領域を形成する工
程と、前記開口部を含む表面上に窒化膜を形成する工程
と、前記拡散領域上の窒化膜のみを酸化膜に変換し第２
の酸化膜とする工程と、該第２の酸化膜とさきに半導体
基板に形成した第１の酸化膜のエツチング速度の違いを
利用して前記第２の酸化膜を選択的に除去する工程と、
第２の酸化膜の除去された開口部を通して不純物拡散を
し、前記第１の拡散領域から高精度超微細間隔で第２の
拡散領域を形成する工程とを含んで構成される。However, the high-precision Yuri exposure machine has the disadvantage of low processing capacity and the problem that the apparatus is expensive. In addition, even if a high-precision Yuri exposure machine is used, the purpose cannot be fully achieved if the number of alignments increases and the errors in subsequent steps are large. eliminates the above-mentioned drawbacks, and can be implemented in a self-aligning manner relatively easily without reducing processing power.
An object of the present invention is to provide a method for manufacturing a semiconductor device in which a diffusion region with s+ precision is formed. selectively forming an opening in the oxide film, etching the oxide film in the opening so that it has a slope, and diffusing impurities through the opening in the sloped oxide film to form a first diffusion region. a step of forming a nitride film on the surface including the opening, and a step of converting only the nitride film on the diffusion region into an oxide film;
a step of selectively removing the second oxide film by utilizing a difference in etching rate between the second oxide film and the first oxide film previously formed on the semiconductor substrate; ,
The method includes the step of diffusing impurities through the openings from which the second oxide film has been removed, and forming second diffusion regions from the first diffusion regions at highly precise ultra-fine intervals.
（作用）
本発明の半導体装置の製造方法によれば、半導体基板上
に形成されだ熱酸化膜に選択的に拡散のための窓開けを
行う。このとき前記酸化膜と絶縁膜Ｃ本実施例ではホト
レジスト）との密着性を悪くするための処理を施した後
、熱酸化膜を除去（以下エツチングと記す）すれば酸化
膜には約４５゜の傾斜が付く。(Function) According to the method of manufacturing a semiconductor device of the present invention, a window for diffusion is selectively opened in a thermally oxidized film formed on a semiconductor substrate. At this time, after performing a treatment to improve the adhesion between the oxide film and the insulating film (photoresist in this example), the thermal oxide film is removed (hereinafter referred to as etching), and the oxide film has an angle of approximately 45°. The slope is attached.
この後不純物拡散を行い第１の拡散領域を形成する。し
かる後窒化膜を形成する０この窒化膜は安定した膜厚の
ものが再現性良く形成することができる。Thereafter, impurity diffusion is performed to form a first diffusion region. Thereafter, a nitride film is formed. This nitride film can be formed with a stable thickness with good reproducibility.
これを電解液中で陽極酸化すると、前記拡散領域上の窒
化膜のみを酸化膜に変換させることができる。When this is anodized in an electrolytic solution, only the nitride film on the diffusion region can be converted into an oxide film.
しかる後、陽極酸化を施した領域の酸化膜のみをエツチ
ングするこの酸化膜は熱酸化によシ形成した第１の酸化
膜とエツチング液に対するエツチング速度が異なるので
陽極酸化膜のみを除去できる０
次いで形成した開口部に不純物拡散を施せば第２の拡散
領域が形成できる。なお鼠化膜の膜厚は任意かつ安定的
に形成することが出来る。しかも本発明方法では最初の
窓開は以後はマスクの目合せ工程は必要なく、連続処理
で行えるので、拡散領域の接合距離を所望の通シに再現
性良く正確に形成することができる。After that, only the oxide film in the anodic oxidized area is etched.Since this oxide film has a different etching rate with respect to the etching solution than the first oxide film formed by thermal oxidation, only the anodic oxide film can be removed. A second diffusion region can be formed by diffusing impurities into the formed opening. Note that the thickness of the rat film can be arbitrarily and stably formed. Moreover, in the method of the present invention, the initial window opening can be performed in a continuous process without the need for subsequent mask alignment steps, so that the bonding distance of the diffusion region can be formed accurately with good reproducibility to the desired length.
（実施例）
以下、本発明の実施例について、図面を参照して説明す
る。(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.
第１図乃至第６図は本発明の一実施例を説明するために
工程順に示した断面図である。1 to 6 are cross-sectional views shown in order of steps to explain an embodiment of the present invention.
まず、第１図に示すように、熱酸化膜２が形成された半
導体基板１上に滴れ性を良くするだめの処理を施す、本
実施例では酸素プラズマの照射処理を施した。しかる稜
ホトレジスト３を形成し所望のパターニングを行う。次
に、ホトレジスト３をマスクとして、熱酸化膜２のエツ
チングを行うが、エツチングの前に純水に２５℃約１分
の浸漬を行う、しかる後弗酸及び弗化アンモニウムの混
合比１：６で調合したものを２５℃の温度で使用する。First, as shown in FIG. 1, the semiconductor substrate 1 on which the thermal oxide film 2 has been formed is subjected to a treatment to improve the dripping property, and in this example, an oxygen plasma irradiation treatment is performed. A corresponding ridge photoresist 3 is formed and desired patterning is performed. Next, using the photoresist 3 as a mask, the thermal oxide film 2 is etched, but before etching, it is immersed in pure water at 25°C for about 1 minute, and then the mixture ratio of hydrofluoric acid and ammonium fluoride is 1:6. Use the mixture prepared above at a temperature of 25°C.
しかるときは約４５°の傾斜を持った拡散用の開口部を
形成することができる。In such cases, a diffusion opening having an inclination of about 45° can be formed.
次に第２図に示すように、４５°の開口部４よシネ細物
拡散を行ない拡散領域５を形成する。Next, as shown in FIG. 2, a diffusion region 5 is formed by performing cine diffusion through the 45° opening 4.
次に、第３図に示すように、半導体基板上全面に、例え
ばＬＰＣＶＤ装置によシ約１ｏｏｏＸの窒化膜６を形成
する。Next, as shown in FIG. 3, a nitride film 6 having a thickness of about 100X is formed over the entire surface of the semiconductor substrate using, for example, an LPCVD apparatus.
次に、第４図に示すように、例えば、エチレングリコー
ルとホウ酸アンモニウムの混合液である電界液中で陽極
酸化を行う。しかるときは拡散領域５上の窒化膜のみが
陽極酸化され第２の酸化膜１６に変換する。Next, as shown in FIG. 4, anodic oxidation is performed in an electrolytic solution that is a mixture of ethylene glycol and ammonium borate, for example. In this case, only the nitride film on the diffusion region 5 is anodized and converted into the second oxide film 16.
次に、第５図に丞すように、弗酸と純水の混合比１：５
０の割合で調合した液を２５℃の温度で用い陽極酸化膜
１６をエツチングする、しかるときはエツチング時間約
２分で陽極酸化膜１６は全てエツチング除去される。し
かしながら熱酸化によシ形成した第１の酸化膜２はエツ
チング速度の違いからほとんどエツチングされることは
なく第２の拡散領域形成のための開口部１４が形成でき
る０次に、第６図に示すように、開口部１４を通して不
純物を拡散し第２の拡散領域７を形成する。Next, as shown in Figure 5, the mixing ratio of hydrofluoric acid and pure water was 1:5.
The anodic oxide film 16 is etched using a solution prepared at a ratio of 0.035° C. at a temperature of 25° C. In this case, the anodic oxide film 16 is completely etched away in an etching time of about 2 minutes. However, the first oxide film 2 formed by thermal oxidation is hardly etched due to the difference in etching speed, and the opening 14 for forming the second diffusion region can be formed in the first oxide film 2, as shown in FIG. As shown, impurities are diffused through the opening 14 to form the second diffusion region 7.
また８は表向保護のため形成した酸化膜であり、熱酸化
法、ＣＶＤ法等で形成できる。Further, 8 is an oxide film formed for surface protection, and can be formed by a thermal oxidation method, a CVD method, or the like.
以上によシ本実施例の半導体装置は完成する。Through the above steps, the semiconductor device of this embodiment is completed.
なお、本実施例では陽極酸化膜のエツチングに弗酸と純
水の混合液を使用したが、これに限定されるものでなく
、例えばドライエツチング法で行うことも可能である。In this embodiment, a mixed solution of hydrofluoric acid and pure water was used for etching the anodic oxide film, but the present invention is not limited to this, and for example, a dry etching method may be used.
この場合は陽樹酸化膜のアンダーエッチが少ないため拡
散の横方向広がりを押えることが可能である。In this case, since there is little underetching of the positive oxide film, it is possible to suppress the lateral spread of diffusion.
（発明の効果）
以上説明したとおり、本発明によれば拡散領域形成にお
いて第１の拡散領域に対し高精度に、かつ微細な距離釦
おける第２の拡散領域形成が再現性良く形成することが
可能となる。(Effects of the Invention) As explained above, according to the present invention, it is possible to form a second diffusion region with high precision and good reproducibility with respect to the first diffusion region by placing a fine distance button. It becomes possible.
第１図乃至第６図は本発明の一実施例を説明するために
工程順に示した断面図である。
１・・・・・・半導体基板、２・・・・・・熱酸化膜（
第１の酸化膜）、３・・・・・・ホトレジス）、４．１
４・・・・・・開口部、５・・・・・・第１の拡散領域
、６・・・・・・電化膜、７・・・・・・第２の拡散領
域、８・・・・・・熱酸化膜、１６・・・・・・陽極酸
化膜（第２の酸化膜）０
葆 ｌ 叉
第 ２ 図
葉３ 図
算４ 圀
茶 ５ 図
革 乙 図1 to 6 are cross-sectional views shown in order of steps to explain an embodiment of the present invention. 1... Semiconductor substrate, 2... Thermal oxide film (
(first oxide film), 3... photoresist), 4.1
4...Opening, 5...First diffusion region, 6...Electrified film, 7...Second diffusion region, 8... ...Thermal oxide film, 16...Anodic oxidation film (second oxide film) 0 葆 l 叉 2nd figure 3 figure 4 Kokucha 5 figure leather Otsu figure
Claims (1)
択的に開口部を形成する工程と、前記開口部の該酸化膜
に傾斜を有するようエッチングする工程と、前記傾斜を
有する酸化膜の開口部を通して不純物を拡散し第１の拡
散領域を形成する工程と、前記開口部を含む表面上に窒
化膜を形成する工程と、前記拡散領域上の窒化膜のみを
酸化膜に変換し第２の酸化膜とする工程と、該第２の酸
化膜とさきに半導体基板に形成した第１の酸化膜のエッ
チング速度の違いを利用して前記第２の酸化膜を選択的
に除去する工程と、第２の酸化膜の除去された開口部を
通して不純物拡散をし、前記第１の拡散領域から高精度
超微細間隔で第２の拡散領域を形成する工程とを含むこ
とを特徴とする半導体装置の製造方法。selectively forming an opening in a first oxide film of the semiconductor formed on a semiconductor substrate; etching the oxide film in the opening so that it has a slope; and the oxide film having the slope. a step of diffusing impurities through an opening to form a first diffusion region, a step of forming a nitride film on the surface including the opening, and a step of converting only the nitride film on the diffusion region to an oxide film. and a step of selectively removing the second oxide film by utilizing the difference in etching rate between the second oxide film and the first oxide film previously formed on the semiconductor substrate. and a step of diffusing impurities through the opening where the second oxide film has been removed to form a second diffusion region from the first diffusion region at a highly precise ultra-fine interval. Method of manufacturing the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13760584A JPS6116514A (en) | 1984-07-03 | 1984-07-03 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13760584A JPS6116514A (en) | 1984-07-03 | 1984-07-03 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6116514A true JPS6116514A (en) | 1986-01-24 |
Family
ID=15202596
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13760584A Pending JPS6116514A (en) | 1984-07-03 | 1984-07-03 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6116514A (en) |
-
1984
- 1984-07-03 JP JP13760584A patent/JPS6116514A/en active Pending
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