JPS61164287A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPS61164287A
JPS61164287A JP543785A JP543785A JPS61164287A JP S61164287 A JPS61164287 A JP S61164287A JP 543785 A JP543785 A JP 543785A JP 543785 A JP543785 A JP 543785A JP S61164287 A JPS61164287 A JP S61164287A
Authority
JP
Japan
Prior art keywords
layer
type
current
current blocking
blocking layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP543785A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kitamura
北村 光弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP543785A priority Critical patent/JPS61164287A/en
Publication of JPS61164287A publication Critical patent/JPS61164287A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To obtain a high photo output in a semiconductor laser by a method wherein a p-type substrate is used for the semiconductor laser, the p-type clad layer and a p-type current blocking layer come into contact to each other on the side surface of the mesa striped mount and a semiconductor layer with the small forbidden band width gap is introduced in on the p-type current blocking layer. CONSTITUTION:A p-type InP clad layer 2, an active layer 3 and an n-type InP clad layer 4 are laminated in order on a p-type InP substrate 1. After that, a mesa striped mount 10 is formed. After that, an n-type InP current blocking layer 5, a p-type InP current blocking layer 6 and an In0.78Ga0.22As0.48P0.52 layer 11 are laminated in order excluding the upper surface of the mesa striped mount 10. Then, an n-type InP buried layer 7 and an n-type In0.78Ga0.22As0.48P0.52 electrode layer 8 are laminated over the whole surface. An InGaAsP layer 11 with the small forbidden band width gap is inserted in between the layers 6 and 7, whereby the current gain of the transistor becomes smaller, the turn-ON withstand voltage of the thyristor is not affected so much by the gate current and even when a leakage current 9 runs on the thyristor to some degree, the thyristor is never turned-ON. As a result, injecting current runs effectively into the active layer 3.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明に埋め込みヘテロ構造の半導体レーザに関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a buried heterostructure semiconductor laser.

(従来技術とその問題点) 埋め込みヘテロ構造半導体レーザ(BH−LD)に、低
い発振しきい値電流、安定化された発振横モード、高温
動作可能などの優れた特性を有しているため5元ファイ
バ通信用光源として実用化が進められている。−万、海
底中継光ファイバ通信は大陸間の長距離かつ大容量の通
信システムとして、その実用化が望まれているが、その
実用化に対しては従来1でない超高信頼の半導体レーザ
の開発が特に強く要請されるようになってきた。
(Prior art and its problems) Buried heterostructure semiconductor lasers (BH-LDs) have excellent characteristics such as low oscillation threshold current, stabilized oscillation transverse mode, and high-temperature operation. Practical use is progressing as a light source for original fiber communications. - It is hoped that submarine relay optical fiber communication will be put into practical use as a long-distance, high-capacity intercontinental communication system, but the development of an ultra-highly reliable semiconductor laser that is unprecedented for its practical use is required. has become a particularly strong demand.

従来、種々の構造のBH−LDが試作されてきたが、主
にn型のInP基板を用いたものが多かった。これにn
型InP上にInGaAsP活性層を成長し5発振波長
1.3μ町 ないし155μmで動作するものであるが
、この場合エピタキシャル成長層表面、特に電極層をp
型としなければならず、LDの信頼性に最も重要な影響
を与える電極の形成条件を厳しいものにしていた。すな
わち、通常オーミック抵抗を小さくするため、InGa
−AsP 層を電極層とし、不純物拡散ないし、結晶成
長時のドーピングによって1×10 crn 以上のp
型不純物濃度とし、AuZn 、 TiPt、  ある
いはCrAuとV’sッだ金属電極を形成していた。
Conventionally, BH-LDs with various structures have been prototyped, but most of them have mainly used n-type InP substrates. In this
In this method, an InGaAsP active layer is grown on an InP type and operates at an oscillation wavelength of 1.3 μm to 155 μm.
The conditions for forming the electrodes, which have the most important effect on the reliability of the LD, are strict. That is, in order to reduce the ohmic resistance, InGa
- AsP layer is used as an electrode layer, and p of 1×10 crn or more is formed by impurity diffusion or doping during crystal growth.
The metal electrode was formed with V's type impurity concentration and AuZn, TiPt, or CrAu.

この場合、いずれの電極材料に対しても400℃〜50
0℃程度の温度範囲で熱処理を加えていた。
In this case, for any electrode material, 400°C to 50°C
Heat treatment was applied at a temperature range of about 0°C.

このような熱処理工程において、電極金属材料の半導体
層中へのしみ込み、あるいはストレスの導入が生じ、そ
れが集子の信頼性を下げていたと考えられる。
In such a heat treatment process, the electrode metal material penetrates into the semiconductor layer or stress is introduced, which is considered to have lowered the reliability of the collector.

これに対して電極形成が容易で高信頼なLDとして、最
近p型InP 基板上に結晶成長を行なって作製するB
H−LDがいくつか報告されるようになってきた。それ
らは主にV溝内に埋め込み活性層を形成するものであり
、分布帰還型(DFB)半導体レーザや分布ブラッグ反
射型(DBR)半導体レーザに適用することが困難であ
り、単一軸モード性による長距離・大容量伝送全実現す
ることができないものである。これ以外にも、従来p型
InP基板を用いたメサ埋め込み構造のBi(−LDが
試作きれたが、電流ブロック層構造が適切でないために
活性層以外への電#t:、もれが太きく、良好な特性が
得られていない。
On the other hand, a highly reliable LD with easy electrode formation has recently been produced by crystal growth on a p-type InP substrate.
Several cases of H-LD have been reported. They mainly form an active layer buried in the V-groove, and are difficult to apply to distributed feedback (DFB) semiconductor lasers and distributed Bragg reflection (DBR) semiconductor lasers, and are difficult to apply to distributed feedback (DFB) semiconductor lasers and distributed Bragg reflection (DBR) semiconductor lasers, and are based on single-axis mode characteristics. Long-distance, large-capacity transmission cannot be fully realized. In addition to this, a Bi(-LD) with a mesa-embedded structure using a p-type InP substrate has been prototyped, but due to an inappropriate current blocking layer structure, there is a large amount of current leakage to areas other than the active layer. However, good characteristics are not obtained.

(従来例) 第5図は従来のメサ構造BH−LDにp型基板を用いた
場合の断面図である。この場合、p−InP基板1上K
p−InPクラッド層2.  InGaAsP活性層3
.n−InPクラッド層4を順次積層した後、メサスト
ライプ10全エツチングによって形成し、さらに埋め込
み成長においてn−InP’E+Aブロック層5.p−
4nP電流ブロック層6をいずれもメサストライプ10
上面のみを除いて、さらに全面にわたってn−InP埋
め込み層7を成長させ、InGaAsP電極層8を形成
した。この活性層3の幅に、横モード制御の点から1.
5μm、厚さハ01μmとした。
(Conventional Example) FIG. 5 is a cross-sectional view of a conventional mesa structure BH-LD using a p-type substrate. In this case, K on the p-InP substrate 1
p-InP cladding layer 2. InGaAsP active layer 3
.. After sequentially laminating the n-InP cladding layer 4, the entire mesa stripe 10 is formed by etching, and then the n-InP'E+A block layer 5 is formed by buried growth. p-
Both 4nP current blocking layers 6 are mesa stripes 10
Except for only the top surface, an n-InP buried layer 7 was further grown over the entire surface to form an InGaAsP electrode layer 8. From the viewpoint of transverse mode control, 1.
The thickness was 5 μm and the thickness was 01 μm.

このBH−LDのp側電極に正の電圧を印加すると、活
性層3に電流が流れ、キャリアの発光再結合によってし
きい値以上でレーザ発根することになる。この場合、活
性層3以外にも、もれ電流ILが、図の矢印のパスでの
ように電流ブロック層6に流れ得る。このようなもれ電
流ILは、第4図に示した電流ブロック層6の構造図の
ように、矢印で示したように、埋め込み層7に流れる。
When a positive voltage is applied to the p-side electrode of this BH-LD, a current flows through the active layer 3, and laser rooting occurs above a threshold value due to radiative recombination of carriers. In this case, in addition to the active layer 3, leakage current IL may flow through the current blocking layer 6 as shown in the path of the arrow in the figure. Such leakage current IL flows into the buried layer 7 as shown by the arrow in the structural diagram of the current blocking layer 6 shown in FIG.

これ1InPのnpnp  サイリスタ構造になってい
るのでゲート電流として作用し、ブレークダウン耐圧を
大幅に下げることになる。すなわち、第5図の従来例の
構造では、ある程度以上注入電流を増やすと、今度はも
れ電流ILばかりが増えるようになり、大きな光出力を
取り出すことができなくなってしまうという問題があっ
た。
Since this has a 1InP npnp thyristor structure, it acts as a gate current, significantly lowering the breakdown voltage. That is, in the conventional structure shown in FIG. 5, there was a problem in that if the injected current was increased beyond a certain level, only the leakage current IL would increase, making it impossible to extract a large optical output.

第5図の例では、波長1.3μ常において発振しきい値
電流は20mA程度と低いものの、光出力の飽和傾向が
太きく、30mw 以上の光出力を得ることが困難であ
った。
In the example shown in FIG. 5, although the oscillation threshold current is as low as about 20 mA at a wavelength of 1.3 μm, the saturation tendency of the optical output is strong, and it is difficult to obtain an optical output of 30 mW or more.

(発明の目的) 本発明の目的は、このような問題点を解決し、特aが良
くかつ高信頼性の埋込みヘテロ構造の半導体レーザ全提
供することにある。
(Objective of the Invention) An object of the present invention is to solve the above-mentioned problems and to provide a buried heterostructure semiconductor laser with good characteristics and high reliability.

(発明の構成) 本発明の構成は、半導体基板上に少なくともp型および
n型の各クラッド層に挾まれた活性層金倉む半導体多層
膜を積層させた多層膜構造半導体ウェファの少なくとも
前記各クラッド層と前記活性層とにメサストライプを形
成し、このメサストライプを埋込み成長して構成される
埋込みヘテロ構造の半導体レーザにおいて、前記メサス
トライプ上面を除いてn型電流ブロック層および前記メ
サストライプの側面で前記p型クラッド層と接触するp
型電流ブロック層が形成され、かつ前記p型電流ブロッ
ク層上にこの電流ブロック層エリもバンドギャップの小
さな半導体層が形成されることを特徴とする。
(Structure of the Invention) The structure of the present invention is a multilayer structure semiconductor wafer in which a semiconductor multilayer film having an active layer sandwiched between at least p-type and n-type cladding layers is laminated on a semiconductor substrate. In a semiconductor laser with a buried heterostructure formed by forming a mesa stripe between the active layer and the active layer, and growing the mesa stripe in a buried manner, the n-type current blocking layer and the side surfaces of the mesa stripe, except for the top surface of the mesa stripe, p in contact with the p-type cladding layer at
A p-type current blocking layer is formed, and a semiconductor layer having a small bandgap is also formed on the p-type current blocking layer.

(発明の原理) 本発明においては、このよりなnpnpサイリスク構造
がゲート電流に対してあまり影響を受けずに、ブレーク
ダウン耐圧が十分大きなようにしてやれば、もれ電流を
小さく抑えることができ、高出力まで安定して動作させ
ることができるわけである。そのために電流ブロック層
上にバンドギャップの小さな半導体層を導入してサイリ
スタを構成するnpnあるいはpnp トランジスタの
電流利得を小さくしている。
(Principle of the Invention) In the present invention, leakage current can be suppressed to a low level by making the npnp silicon risk structure not significantly affected by gate current and having a sufficiently large breakdown voltage. This means that it can operate stably up to high output. To this end, a semiconductor layer with a small bandgap is introduced on the current blocking layer to reduce the current gain of the npn or pnp transistor constituting the thyristor.

(実施例) 次に図面により本発明の詳細な説明する。(Example) Next, the present invention will be explained in detail with reference to the drawings.

第1図は本発明の第1のW流側であるBH−LDの構造
断面図である。このBH−LDを得るには、まず従来例
と同様に、p−InP基板1上にp−1nPクラッド層
29発光波長1.3μ情 に相当するノンドープInO
,72GaO,2BAsO061po、39活性層3を
厚さ0、111m 、 n−InPクラッド層4f:厚
さ1μm  順次積層する。その後通常の化学エツチン
グ技術を用いてメサストライプ10を形成する。このメ
サストライプ10は深さが3μm活性層3が幅1.5μ
mとなるように形成した。その後メサストライプ10の
上面を除いてn−1nP電流ブロック層5を厚さ約0.
7μmt  pLnP電流ブロック層6を厚き約2μm
FIG. 1 is a structural sectional view of a BH-LD which is the first W flow side of the present invention. To obtain this BH-LD, first, as in the conventional example, a p-InP cladding layer 29 is coated with non-doped InO corresponding to an emission wavelength of 1.3 μm on a p-InP substrate 1.
, 72GaO, 2BAsO061po, 39 active layers 3 with a thickness of 0 and 111 m, and an n-InP cladding layer 4f with a thickness of 1 μm. Mesa stripes 10 are then formed using conventional chemical etching techniques. This mesa stripe 10 has a depth of 3 μm and an active layer 3 with a width of 1.5 μm.
It was formed so that it became m. Thereafter, an n-1nP current blocking layer 5 is formed to a thickness of approximately 0.0 mm except for the upper surface of the mesa stripe 10.
7 μmt pLnP current blocking layer 6 approximately 2 μm thick
.

発光波長1.2μmに相当するノンドープのI n O
,78Ga0,22AS0.48P0.52層11を厚
さ約0.2t1m順次積層し、次いで全面にわたってn
−InP埋め込み層7、発光波長12μ常に相当するn
−In O,78Gao22A 80.48 Po、5
2電極層8を積層した。
Non-doped I n O corresponding to an emission wavelength of 1.2 μm
, 78Ga0, 22AS0.48P0.52 layers 11 were sequentially laminated to a thickness of about 0.2t1m, and then n
-InP buried layer 7, emission wavelength 12μ always corresponds to n
-In O,78Gao22A 80.48 Po,5
Two electrode layers 8 were laminated.

この場合にも活性層3のわき上流れるもれ電流IL i
d、図中の矢印のパスで流れることになり、従来例と同
様1/J−pnpn構造サイリスタのゲート電流として
作用する。ところがこの場合、第3図に示すようにb 
 l”pnサイリスタを構成するnpn トランジスタ
に、バンドギャップの小さなInGaAsP層11が挿
入されているためトランジスタの電流利得が小ざくなり
、そのためサイリンスタのターンオン耐圧にゲート電流
にあ筐り影響されず、 したがってもれ電流9がある程
度流れてもターンオンすることがなく、注入電流は有効
に活性層3に流れることになる。
In this case as well, the leakage current IL i flowing to the side of the active layer 3
d. The current flows along the path indicated by the arrow in the figure, and acts as the gate current of the 1/J-pnpn structure thyristor as in the conventional example. However, in this case, as shown in Figure 3, b
Since the InGaAsP layer 11 with a small bandgap is inserted into the npn transistor constituting the l''pn thyristor, the current gain of the transistor is small, so that the turn-on withstand voltage of the thyristor is not affected by the gate current. Even if the leakage current 9 flows to some extent, it will not turn on, and the injected current will effectively flow into the active layer 3.

このような構造のBH−LDを長で300μmF切り出
したところ、室温CWVt−おける発振しきい値電流が
20 mA、微分1子効率60%、60mW以上まで横
基本モードで発振し、最高CW動作温度として120℃
程度のものが再現性工〈得られた。
When a BH-LD with such a structure was cut out with a length of 300 μmF, the oscillation threshold current at room temperature CWVt- was 20 mA, the differential singleton efficiency was 60%, the oscillation was performed in the transverse fundamental mode up to 60 mW or more, and the maximum CW operating temperature was as 120℃
Reproducibility of some degree was obtained.

この素子のn側にTiPtAu系の電極を形成し、25
0℃という低い温度で熱処理を行なったものの集子抵抗
は40程度の十分に低い値が得られた。
A TiPtAu-based electrode is formed on the n side of this element, and
Even though the heat treatment was performed at a low temperature of 0° C., a sufficiently low value of collector resistance of about 40 was obtained.

また、AuSn融剤を用いたダイヤモンドヒートシンク
にマウントして70℃5mW、 および70℃10mW
の定光出力駆動の信頼性試験を行なったところ、劣化率
はそれぞれ1〜2 X 10= H−1,4〜5X10
−’H−1と従来の素子と比べてほぼ10倍の信頼性改
善が認められた。さらに、この構造を活性層3に隣接し
て回折格子を有するガイド層を形成し、DFB−LDを
作製したところ、室温CW動作で最高68 mWの単一
軸モード発振を得、さらにファプリペローレーザと同等
の高信頼な結果を得た。
In addition, when mounted on a diamond heat sink using AuSn flux, 5 mW at 70°C and 10 mW at 70°C were applied.
When we conducted a reliability test of constant light output drive, the deterioration rate was 1 to 2 x 10 = H-1, 4 to 5 x 10, respectively.
-'H-1 was found to be approximately 10 times more reliable than the conventional element. Furthermore, when we fabricated a DFB-LD using this structure by forming a guide layer with a diffraction grating adjacent to the active layer 3, single-axis mode oscillation of up to 68 mW was obtained at room temperature CW operation, and furthermore, a Farpry-Perot laser We obtained highly reliable results equivalent to

第2図は本発明の第2の実施例であるB H−L I)
の断面図を示す。この場合も同様にp−1nP基板1上
に活性層3全含む二重ヘテロ構造全形成し、メサエッチ
ングを行なった。ただし、この場合n −I n Pク
ラッド層4を厚さ2trm、  n−Ino、7aGa
o、2zASo、4sP0.52電極層11を厚さ05
μm形成し、逆メサ構造にエツチングを行い、このメサ
ストライプ1゜ば3.5/j?7L  程度の深ことし
た。p−InP電流ブロック層6げメサストライプ10
の側面でp−InPクラッド層2と接するようにした。
FIG. 2 shows a second embodiment of the present invention.
A cross-sectional view is shown. In this case as well, the entire double heterostructure including the entire active layer 3 was formed on the p-1nP substrate 1, and mesa etching was performed. However, in this case, the n-I n P cladding layer 4 has a thickness of 2 trm, n-Ino, 7aGa
o, 2zASo, 4sP0.52 electrode layer 11 with thickness 05
μm is formed, etched into an inverted mesa structure, and this mesa stripe is 1° = 3.5/j? It was about 7L deep. p-InP current blocking layer 6 mesa stripe 10
It was made to contact the p-InP cladding layer 2 at the side surface.

また、埋め込み成長の最終層はp−InP キャップ層
12とした。
Further, the final layer of buried growth was a p-InP cap layer 12.

この実施例においてC儂、エビ成長層表面がメサストラ
イプ10の部分のみn型となり、他げn型となっている
。例えば、TiPtAu の電極を形成するとp−In
P キャップ層12と電極との間にショットキーバリア
が形成されることになるので、この部分でキャパシタン
ス成分を十分に小さくすることができる。したがって全
面電極構造としてもIGb/s以上の高速@接変調が十
分可能となった。この場合、もれ電流ILげ、図の矢印
で示したパスで流れることになるが、この場合にもサイ
リスタ構造の中にバンドギャップの小さなInGaAs
P層11が形成されているため、ターンオンしにくく、
シたがって高い光出力レベルまで安定に動作するB H
−L D が得られた。同様に、レーザベレットに切り
出して特性を評価したところ、第1の実施例に示したも
のとほぼ同等の高性能、高信頼な結果が得られた。
In this embodiment, only the mesa stripe 10 portion of the surface of the shrimp growth layer is n-type, and the rest is n-type. For example, if a TiPtAu electrode is formed, p-In
Since a Schottky barrier is formed between the P cap layer 12 and the electrode, the capacitance component can be made sufficiently small in this portion. Therefore, even with a full-surface electrode structure, high-speed @contact modulation of IGb/s or higher is fully possible. In this case, the leakage current IL will flow along the path shown by the arrow in the figure, but in this case as well, the thyristor structure contains InGaAs with a small band gap.
Because the P layer 11 is formed, it is difficult to turn on,
Therefore, the BH operates stably up to high optical output levels.
-LD was obtained. Similarly, when a laser pellet was cut out and its characteristics were evaluated, results with high performance and high reliability almost equivalent to those shown in the first example were obtained.

なお、水災流側においては、  InP全基板、InG
a−AsP  fz活性層とする波長1μm帯の素子を
示したが、これに限るものでばなく、GaA7As /
GaAsInGaA、s/AjInAs  系等他の半
導体材料を用いて何ら差しつかえない。さらに、水災流
側においては、メサストライプ10以外の部分をすべて
エツチングして除去した構造を示したが、これに限るも
ので汀なく、例えばメサストライプ10の両側にエツチ
ング溝が形成され、その外側には活性層3等が残でれた
構造のものでもかまわない。
In addition, on the flood disaster side, all InP substrates, InG
Although a device with a wavelength band of 1 μm as an a-AsP fz active layer is shown, the device is not limited to this, and GaA7As/
There is no problem in using other semiconductor materials such as GaAsInGaA and s/AjInAs. Furthermore, on the water disaster side, a structure in which all parts other than the mesa stripe 10 are etched and removed is shown, but this is not limited to this, and for example, etched grooves are formed on both sides of the mesa stripe 10, and the etched grooves are formed on the outside. It may be of a structure in which the active layer 3 and the like remain.

(発明の効果) 以上説明したように、本発明によれば、メサスドライブ
を有するBH−LDにおいて、p型の基板を用い、p型
クラッド層とp2!11.l電流ブロック層とがメサス
トライプの倶1面で接し、かつp型電流、ブロック層の
上にバンドギャップの小さな半導体層を導入したことV
Cより、高い光出力が得られ、特性が向上するとともに
、集子信頼性の大幅に改善されたB1−1−Ll)が得
られた。
(Effects of the Invention) As described above, according to the present invention, in a BH-LD having a mesa drive, a p-type substrate is used, a p-type cladding layer and p2!11. l The current blocking layer is in contact with one side of the mesa stripe, and a semiconductor layer with a small band gap is introduced on the p-type current blocking layer.V
B1-1-Ll) was obtained which had higher optical output, improved characteristics, and significantly improved concentrator reliability than C.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、@2図ぼ本発明の第1および第2の実施例のB
I−]−LDの断面構造図、第3図、第4図は本発明お
よび従来例によるB H−L i)の電流ブロック構造
の模式図、第5図げ従来例によるBH−LDの断面構造
図を示す。図中、1ばp−InP基板、2ばp−InP
クラッド層、3は活性層、4はn−1nP  クラッド
層、5ぼn −I n P電流ブロック層。 61dp−1nP電流ブロック層、7ばn−InP埋込
み層、8ばInGaAsP電極層、10汀メサストライ
プ、11はInGaAsP層、12idp−InPキャ
ップ層をそれぞれ表わす。 代理人 弁理士  内 原   9′ −白・、・:
Figures 1 and 2 show B of the first and second embodiments of the present invention.
3 and 4 are schematic diagrams of the current block structure of BH-L i) according to the present invention and the conventional example. Figure 5 is a cross-sectional view of the BH-LD according to the conventional example. A structural diagram is shown. In the figure, 1 p-InP substrate, 2 p-InP
3 is an active layer, 4 is an n-1nP cladding layer, and 5 is a n-InP current blocking layer. 61 dp-1nP current blocking layer, 7 n-InP buried layer, 8 InGaAsP electrode layer, 10 mesa stripe, 11 InGaAsP layer, 12 idp-InP cap layer, respectively. Agent Patent Attorney Uchihara 9' - Shiro・・・:

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に少なくともp型およびn型の各クラッド
層に挾まれた活性層を含む半導体多層膜を積層させた多
層膜構造半導体ウェファの少なくとも前記各クラッド層
と前記活性層とにメサストライプを形成し、このメサス
トライプを埋込み成長して構成される埋込みヘテロ構造
の半導体レーザにおいて、前記メサストライプ領域を除
いてn型電流ブロック層および前記メサストライプの側
面で前記p型クラッド層と接触するp型電流ブロック層
が形成され、かつ前記p型電流ブロック層上にこの電流
ブロック層よりもバンドキャップの小さな半導体層が形
成されることを特徴とする半導体レーザ。
Forming mesa stripes on at least each of the cladding layers and the active layer of a multilayer structure semiconductor wafer in which a semiconductor multilayer film including an active layer sandwiched between at least p-type and n-type cladding layers is laminated on a semiconductor substrate. However, in a semiconductor laser having a buried heterostructure formed by growing this mesa stripe in a buried manner, an n-type current blocking layer and a p-type current blocking layer in contact with the p-type cladding layer on the side surface of the mesa stripe, except for the mesa stripe region, are provided. A semiconductor laser comprising: a current blocking layer; and a semiconductor layer having a smaller bandgap than the current blocking layer formed on the p-type current blocking layer.
JP543785A 1985-01-16 1985-01-16 Semiconductor laser Pending JPS61164287A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP543785A JPS61164287A (en) 1985-01-16 1985-01-16 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP543785A JPS61164287A (en) 1985-01-16 1985-01-16 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS61164287A true JPS61164287A (en) 1986-07-24

Family

ID=11611170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP543785A Pending JPS61164287A (en) 1985-01-16 1985-01-16 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS61164287A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870650A (en) * 1986-11-27 1989-09-26 U.S. Philips Corp. Semiconductor laser having a boundary-region absorption layer
JPH0354883A (en) * 1989-07-22 1991-03-08 Sumitomo Electric Ind Ltd Buried type semiconductor laser
JPH03286586A (en) * 1990-04-03 1991-12-17 Nec Corp Integration type light modulator and manufacture thereof
JPH04317384A (en) * 1991-04-16 1992-11-09 Mitsubishi Electric Corp Semiconductor light emitting device
JPH06338654A (en) * 1993-05-28 1994-12-06 Nec Corp Semiconductor laser, manufacture thereof and semiconductor laser array
JPH0888445A (en) * 1994-09-20 1996-04-02 Nec Corp Buried p-type substrate semiconductor laser
US5568501A (en) * 1993-11-01 1996-10-22 Matsushita Electric Industrial Co., Ltd. Semiconductor laser and method for producing the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870650A (en) * 1986-11-27 1989-09-26 U.S. Philips Corp. Semiconductor laser having a boundary-region absorption layer
JPH0354883A (en) * 1989-07-22 1991-03-08 Sumitomo Electric Ind Ltd Buried type semiconductor laser
JPH03286586A (en) * 1990-04-03 1991-12-17 Nec Corp Integration type light modulator and manufacture thereof
JPH04317384A (en) * 1991-04-16 1992-11-09 Mitsubishi Electric Corp Semiconductor light emitting device
JPH06338654A (en) * 1993-05-28 1994-12-06 Nec Corp Semiconductor laser, manufacture thereof and semiconductor laser array
US5568501A (en) * 1993-11-01 1996-10-22 Matsushita Electric Industrial Co., Ltd. Semiconductor laser and method for producing the same
US5856207A (en) * 1993-11-01 1999-01-05 Matsushita Electric Industrial Co., Ltd. Method for producing a semiconductor laser
US6110756A (en) * 1993-11-01 2000-08-29 Matsushita Electric Industrial Co., Ltd. Method for producing semiconductor laser
JPH0888445A (en) * 1994-09-20 1996-04-02 Nec Corp Buried p-type substrate semiconductor laser

Similar Documents

Publication Publication Date Title
US8891570B2 (en) Optical semiconductor device
JP2003060310A (en) Semiconductor optical element and manufacturing method therefor
US5847415A (en) Light emitting device having current blocking structure
JPH07106685A (en) Semiconductor laser
JPS61164287A (en) Semiconductor laser
JP3488137B2 (en) Optical semiconductor device and method of manufacturing the same
CN111937260B (en) Semiconductor laser and method for manufacturing the same
JPS61210689A (en) Structure of semiconductor laser and manufacture of said laser
JPS58207690A (en) Buried type semiconductor laser
JP2555984B2 (en) Semiconductor laser and manufacturing method thereof
JPS59198786A (en) Distributed feedback type semiconductor laser
JPH05226774A (en) Semiconductor laser element and its production
JPH07131116A (en) Semiconductor laser element
JPH07120836B2 (en) Semiconductor laser
JP2740165B2 (en) Semiconductor laser
JPH03120775A (en) Embedded structure semiconductor and its manufacture
JPH0983077A (en) Semiconductor optical device
JPS641072B2 (en)
JPS6237914B2 (en)
JPS6261383A (en) Semiconductor laser and manufacture thereof
JPS6148277B2 (en)
JPS6112399B2 (en)
JPS622720B2 (en)
JPS62102583A (en) Buried structure semiconductor laser
JPS6353718B2 (en)