JPS61161727A - Method and apparatus for preventing warpage of silicon wafer - Google Patents

Method and apparatus for preventing warpage of silicon wafer

Info

Publication number
JPS61161727A
JPS61161727A JP60002426A JP242685A JPS61161727A JP S61161727 A JPS61161727 A JP S61161727A JP 60002426 A JP60002426 A JP 60002426A JP 242685 A JP242685 A JP 242685A JP S61161727 A JPS61161727 A JP S61161727A
Authority
JP
Japan
Prior art keywords
heating
section
cooling
temperature
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60002426A
Other languages
Japanese (ja)
Inventor
Tetsuo Fukuda
哲生 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60002426A priority Critical patent/JPS61161727A/en
Publication of JPS61161727A publication Critical patent/JPS61161727A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Abstract

PURPOSE:To prevent an Si wafer to be warped, by holding Si single crystals at a temperature directly under the melting point within the atmosphere of an inactive gas under a reduced pressure and then quenching them to a normal temperature. CONSTITUTION:An apparatus consists of a section 5 for heating Si crystals and a section 6 for cooling them. The sections are isolated from each other by a gate valve 7. The heating section 5 consists of a cylindrical heater 8 made from superpure fine carbon particles and of a heating box suspended from the above at the center of the cylindrical heater and made from superpure fine carbon particles. The heating box 9 contains Si single crystals 10 within it and maintains uniform temperature distribution while they are heated at a temperature directly under the melting point. In order to improve the temperature distribution, the heating box 9 is rotatable by a pull-up device 11. The cooling section 6 is provided with a cooling gas feeding orifice 12 and a gas discharging orifice 13. Using the apparatus thus constructed, it is possible to produce Si having a high content of oxygen but a few latent oxygen cores.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はウェハの反りを抑制する方法と、これを行う装
置の構成に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for suppressing wafer warpage and a configuration of an apparatus for performing the same.

大量の情報を高速に処理する必要上から情報処理装置の
主要な構成要素であるIc、LSIなどの半導体装置は
高密度化が進み、VLSIが実用化されるに至っている
Due to the need to process a large amount of information at high speed, semiconductor devices such as ICs and LSIs, which are the main components of information processing devices, have become more densely packed, and VLSIs have come into practical use.

すなわち単位素子を構成する半導体領域のサイズおよび
パターン幅は微細化し、最小配線パターン幅として2μ
m程度が実用化されている。
In other words, the size and pattern width of the semiconductor region constituting a unit element have become finer, and the minimum wiring pattern width has been reduced to 2μ.
m is in practical use.

さてIC,LSIなど半導体装置の大部分のものは厚さ
が約500μmのシリコン(St)ウェハを用い、薄膜
形成技術と写真食刻技術(ホトリゾグラフィ)を用いて
パターン形成が行われている。
Now, most semiconductor devices such as ICs and LSIs use silicon (St) wafers with a thickness of approximately 500 μm, and patterns are formed using thin film formation technology and photolithography. .

すなわちスピンコード法などによりウェハ上にレジスト
を被覆し、これに密着露光或いは投影露光によりマスク
の微細パターンを感光させ、これに現像、定着の処理を
行ってレジストパターンを作り、このレジストパターン
をマスクとして化学エツチング或いはドライエツチング
を行うことによって半導体ウェハ上に微細パターンが形
成されている。
That is, a resist is coated on a wafer using a spin code method, etc., a fine pattern on the mask is exposed to light by contact exposure or projection exposure, and then developed and fixed to create a resist pattern, and this resist pattern is used as a mask. Fine patterns are formed on semiconductor wafers by chemical etching or dry etching.

ここで微細パターンを精度良く形成するには被処理ウェ
ハが平坦であり、反りの少ないことが必要条件となる。
In order to form fine patterns with high precision, it is necessary that the wafer to be processed be flat and have little warpage.

〔従来の技術〕[Conventional technology]

先に記したようにIC,LSIなどの半導体装置の製造
に使用されるSiウェハの厚さは約500 μmであり
、一方引き上げ法(チョクラルスキー法)で作られるS
i単結晶の径は4インチから5インチへ、また5インチ
から6インチへと大型化している。
As mentioned earlier, the thickness of Si wafers used in the manufacture of semiconductor devices such as ICs and LSIs is approximately 500 μm.
The diameter of i single crystals has increased from 4 inches to 5 inches, and from 5 inches to 6 inches.

またICは高密度化されるに従って多層化が進んでおり
、この多層化は化学気相成長法(CVD法)を用いてパ
ターン形成の施された被処理基板の上に燐硅酸ガラス(
PSG)からなる絶縁層を繰り返し層形成することによ
り行われている。
Furthermore, as ICs become more densely packed, they are becoming more and more multi-layered.
This is done by repeatedly forming an insulating layer made of (PSG).

すなわちPSGからなる絶縁層に配線パターンを形成す
ると共にコンタクトホールを通じて被処理基板上に設け
た配線パターン或いは半導体領域と回路接続する工程を
繰り返し行っている。
That is, the process of forming a wiring pattern on an insulating layer made of PSG and connecting the circuit to a wiring pattern or a semiconductor region provided on a substrate to be processed through a contact hole is repeatedly performed.

ここでPSG層をCVD法で形成するには被処理基板は
少なくとも425℃の温度で30分程度の熱処理を必要
とする。
Here, in order to form the PSG layer by the CVD method, the substrate to be processed requires heat treatment at a temperature of at least 425° C. for about 30 minutes.

それ故にウェハは半導体装置の完成までにはCvD処理
だけで数時間の熱処理を受けることになり、ウェハ内部
または表面に存在する析出酸素量、転位、L:り線など
が原因して反りが発生し易い。
Therefore, the wafer undergoes several hours of heat treatment just by CvD treatment before the semiconductor device is completed, and warping occurs due to the amount of precipitated oxygen, dislocations, L: warp lines, etc. that exist inside or on the wafer surface. Easy to do.

第2図はウェハ中の格子間酸素量と反りとの関係を示す
ものであり、径4インチ、厚さ約500 μmのウェハ
について、前処理条件を変えて700℃で50時間の処
理を行った結果を示している。
Figure 2 shows the relationship between the amount of interstitial oxygen in a wafer and warpage.A wafer with a diameter of 4 inches and a thickness of approximately 500 μm was treated at 700°C for 50 hours under different pretreatment conditions. The results are shown below.

すなわち実線1は前処理を行わないウェハについての傾
向で、格子間酸素原子の含有量が多いウェハ程反りの発
生が少ないことを示している。
In other words, the solid line 1 shows the tendency for wafers that are not pretreated, and indicates that the wafer with a higher content of interstitial oxygen atoms is less likely to warp.

また破線2は予め1000℃で16時間の焼鈍処理を施
したウェハについての傾向を示すもので、酸素原子の含
有量の多いものほど反りの発生が大きいことを示してい
る。
Moreover, the broken line 2 shows the tendency for wafers that have been annealed at 1000° C. for 16 hours in advance, and indicates that the higher the content of oxygen atoms, the greater the occurrence of warpage.

このような傾向から固溶状態の酸素原子は反りの原因と
なる転位の発生、増殖および移動を抑制する効果がある
が、予め熱処理を施して酸素原子を凝集させて析出させ
ると、これらの効果が消失すると考えられている。
Because of this tendency, oxygen atoms in a solid solution state have the effect of suppressing the generation, proliferation, and movement of dislocations that cause warping, but if heat treatment is applied in advance to agglomerate and precipitate oxygen atoms, these effects can be suppressed. is thought to disappear.

従って反りの少ないウェハを作るには酸素濃度が高く、
且つ熱処理を行っても析出が生じないようにすればよい
Therefore, in order to make wafers with less warpage, the oxygen concentration must be high.
In addition, it is sufficient to prevent precipitation from occurring even if heat treatment is performed.

然し、このような条件を作ることは困難であり、従来は
ウェハの酸素濃度を実線1と破線2の交点付近の値に保
持し、反りの発生が比較的少ない状態で使用する以外に
方法がなかった。
However, it is difficult to create such conditions, and conventionally there is no other way than to maintain the oxygen concentration of the wafer at a value near the intersection of solid line 1 and broken line 2 and use it in a state where the occurrence of warping is relatively low. There wasn't.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上記したようにウェハ中に含まれる格子間酸素量が多
いもの程、反りを抑制することは知られているが、転位
発生の原因となる酸素の析出核の発生を阻止できないこ
とが問題である。
As mentioned above, it is known that the higher the amount of interstitial oxygen contained in a wafer, the more it suppresses warpage, but the problem is that it cannot prevent the generation of oxygen precipitation nuclei that cause dislocations. be.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題点は不活性ガスの減圧雰囲気中で融点直下の
温度に保持したのち、常温まで急冷したSi単結晶を使
用することを特徴とするSiウェハの反り抑制方法をと
ることより実現することができる。
The above problem can be solved by using a method for suppressing warpage of Si wafers, which is characterized by using a Si single crystal that is maintained at a temperature just below its melting point in a reduced pressure atmosphere of inert gas and then rapidly cooled to room temperature. I can do it.

〔作用〕[Effect]

本発明はウェハの反りは格子間酸素量が減少したことに
より起こり、一方つェバ内における酸素の析出は酸素の
潜在核が存在して始めて生じることから、Siの融点直
下の温度で加熱することにより潜在核を拡散溶解させ、
これにより格子間に存在する酸素原子の減少を抑制する
ものである。
In the present invention, wafer warpage is caused by a decrease in the amount of interstitial oxygen, and oxygen precipitation in the wafer only occurs when latent oxygen nuclei exist, so heating is performed at a temperature just below the melting point of Si. By doing so, the latent nucleus is diffused and dissolved,
This suppresses the reduction of oxygen atoms existing in the interstitial space.

すなわち本発明は潜在核を溶解した後に急冷することに
より酸素原子が一様に固溶した状態を常温まで凍結する
もので、これにより熱処理を加えても容易に酸素の析出
が起こらない条件を作り出すものである。
In other words, the present invention involves melting the latent nucleus and then rapidly cooling it to freeze the state in which oxygen atoms are uniformly dissolved in solid solution to room temperature. This creates conditions in which oxygen precipitation does not easily occur even if heat treatment is applied. It is something.

〔実施例〕〔Example〕

第1図の実線3は径4インチ、厚さ501℃mのSi単
結晶を10Torrのアルゴン(Ar):$i圧雰囲気
中で1350℃の温度で1時間加熱し、その後400 
’Cまで15分で急冷したものを試料とし、これを窒素
(N2)雰囲気中で700℃で処理した場合の酸素濃度
の推移を示したものである ここで700℃を選んだ理由はSi単結晶中の格子間に
溶解している酸素原子が、酸素として析出して最も欠陥
を生じ易い温度であることによる。
Solid line 3 in Fig. 1 indicates that a Si single crystal with a diameter of 4 inches and a thickness of 501 °C is heated at a temperature of 1350 °C for 1 hour in an argon (Ar): $i pressure atmosphere of 10 Torr, and then heated at a temperature of 400 °C.
This graph shows the change in oxygen concentration when a sample was rapidly cooled to 'C in 15 minutes and was treated at 700°C in a nitrogen (N2) atmosphere.The reason for choosing 700°C is that This is because the temperature is at which oxygen atoms dissolved between interstitials in the crystal are most likely to precipitate as oxygen and cause defects.

なお比較のために本発明を実施しない無処理のSi単結
晶についての結果を破線4で示した。
For comparison, a broken line 4 shows the results for an untreated Si single crystal that was not subjected to the present invention.

ここで実線3を仔細に観察すると熱処理の開始と共に酸
素濃度は僅か増加するが、これは単結晶の引き上げ工程
中に起こる口・ノドの冷却によって単結晶中にはかなり
の潜在核が形成されているが、これが融点直下の温度に
おける加熱によって結晶中に再溶解し、結果として酸素
濃度が増加することを示している。
If we closely observe the solid line 3, the oxygen concentration increases slightly with the start of heat treatment, but this is because a considerable number of latent nuclei are formed in the single crystal due to the cooling of the mouth and throat that occurs during the single crystal pulling process. However, it has been shown that this is redissolved into the crystal by heating at a temperature just below the melting point, resulting in an increase in oxygen concentration.

また、その後700℃での熱処理を続けても僅かしか酸
素濃度は減少していない。
Moreover, even if the heat treatment at 700° C. was continued thereafter, the oxygen concentration decreased only slightly.

一方、本発明に係る処理を施していない破線4の単結晶
は酸素濃度は時間の経過と共に減少しており、以上のこ
とから本発明の有効性が明らかである。
On the other hand, the oxygen concentration of the single crystal indicated by the broken line 4 which has not been subjected to the treatment according to the present invention decreases over time, and from the above, the effectiveness of the present invention is clear.

第3図は本発明に係る加熱法を容易に実施可能な熱処理
装置の構成を示すものである。
FIG. 3 shows the configuration of a heat treatment apparatus that can easily carry out the heating method according to the present invention.

すなわち本装置はSi結晶の加熱部5と冷却部6とから
なり、両者はゲートバルブ7により隔てられている。
That is, this device consists of a Si crystal heating section 5 and a cooling section 6, which are separated by a gate valve 7.

ここで加熱部5は超高純度微粒子のカーボンよりなる円
筒状のヒータ8とこのヒータ8の中央位置に上部より懸
垂され、超高純度微粒子のカーボンよりなる加熱用筺体
9から構成ささている。
Here, the heating section 5 consists of a cylindrical heater 8 made of ultra-high purity fine carbon particles and a heating casing 9 suspended from above at the center of the heater 8 and made of ultra-high purity fine carbon particles.

ここで加熱用筺体9は中にSi単結晶10を格納し、融
点直下の温度で加熱する際に均一な温度分布を保つよう
になっている。
Here, the heating housing 9 stores the Si single crystal 10 therein, and is designed to maintain a uniform temperature distribution when heated at a temperature just below the melting point.

なおヒータ8および加熱用筺体9は予め1600°C以
上の温度で充分に空焼きし、カーボン中の不純物を除去
しておくことが必要である。
Note that the heater 8 and the heating casing 9 must be sufficiently air-baked in advance at a temperature of 1600° C. or higher to remove impurities in the carbon.

なお温度分布を良くするため加熱用筺体9は引き上げ装
置1)により回転可能に形成されている。
In order to improve the temperature distribution, the heating casing 9 is rotatably formed by a lifting device 1).

また冷却部6には冷却用のガス送入口12とガス送出口
13とが設けられている。
Further, the cooling section 6 is provided with a gas inlet 12 and a gas outlet 13 for cooling.

かかる装置を用いて本発明に係る高温加熱と急冷を行う
手順を記すと次のようになる。
The procedure for performing high-temperature heating and rapid cooling according to the present invention using such an apparatus is as follows.

単結晶引き上げ装置により成長した単結晶ロッドは適当
な寸法に切断してSi単結晶10が準備される。
The single crystal rod grown by the single crystal pulling device is cut into appropriate dimensions to prepare the Si single crystal 10.

かかるSi単結晶10は加熱用筐体9の中の据付は台の
上に載置され、ガス送入口12より^rガスを供給しな
がら真空排気装置を用いて排気口14より排気し、ガス
送入口12に設けたガスフローメータを調節してAr圧
を約10 Torrに保ち、この状態で融点直下の温度
、例えば1350℃に加熱すると共に加熱用筐体を回転
させる。
The Si single crystal 10 is installed in the heating casing 9 on a stand, and while gas is supplied from the gas inlet 12, it is evacuated from the exhaust port 14 using a vacuum evacuation device. The Ar pressure is maintained at about 10 Torr by adjusting the gas flow meter provided at the inlet 12, and in this state, the heating case is heated to a temperature just below the melting point, for example, 1350° C., and the heating casing is rotated.

そして所定の時間例えば1時間に互って加熱した後、引
き上げ装置1)を用いて一点破線で示した位置にまで引
き上げ、ゲートバルブ7で加熱部5を遮断した状態でガ
ス送入口12よりN2或いはArガスを吹きつけて加熱
用筺体9を急冷する。
After heating each other for a predetermined period of time, for example, one hour, the pulling device 1) is used to lift the device to the position shown by the dotted line, and with the gate valve 7 shutting off the heating section 5, N2 is supplied from the gas inlet 12. Alternatively, the heating casing 9 is rapidly cooled by blowing Ar gas.

このようにすれば酸素含有量が高いにも拘わらず、酸素
潜在核の少ないSiを作ることができるので、製造工程
中を通じて加熱されても酸素の析出が少なく、従って反
りの少ないウェハを供給することができる。
In this way, Si with a high oxygen content but with few latent oxygen nuclei can be produced, so even when heated during the manufacturing process, less oxygen is precipitated, thus providing wafers with less warping. be able to.

〔発明の効果〕〔Effect of the invention〕

以上記したように本発明の実施により酸素含有量が多く
、反りの非常に少ないウエノλを作ることが可能となる
As described above, by carrying out the present invention, it becomes possible to produce Ueno λ with a high oxygen content and very little warping.

変化を示す特性図、 第2図は酸素濃度と反りの関係を示す特性図、第3図は
本発明に係る熱処理装置の構成図、である。
FIG. 2 is a characteristic diagram showing the relationship between oxygen concentration and warpage, and FIG. 3 is a configuration diagram of the heat treatment apparatus according to the present invention.

図において、 5は加熱部、      6は冷却部、7はゲートバル
ブ、    8はヒータ、9は加熱用筐体、    1
0はSi単結晶、1)は引き上げ装置、   12はガ
ス送入口、である。
In the figure, 5 is a heating section, 6 is a cooling section, 7 is a gate valve, 8 is a heater, 9 is a heating casing, 1
0 is a Si single crystal, 1) is a pulling device, and 12 is a gas inlet.

峯1 町 □ ?!’ 拳2酊 委3I¥IrMine 1 town □ ? ! ’ fist 2 drunkenness Committee 3I¥Ir

Claims (2)

【特許請求の範囲】[Claims] (1)不活性ガスの減圧雰囲気中でシリコン単結晶を融
点直下の温度に保持したのち、急冷して使用することを
特徴とするシリコンウェハの反り抑制方法。
(1) A method for suppressing warpage of a silicon wafer, which comprises holding a silicon single crystal at a temperature just below its melting point in a reduced pressure atmosphere of an inert gas, and then rapidly cooling it before use.
(2)シリコン単結晶を高温より急冷する装置が真空気
密構造をとり、ゲートバルブで隔てられた加熱部と冷却
部とから構成されており、該加熱部が円筒状のヒータと
、該ヒータの中央位置に懸垂して配置されており、単結
晶を載置する加熱用筐体を含んで構成され、また冷却部
が前記加熱用筐体の巻上げ機構と冷却ガスの送入口と送
出口とを含んで構成されていることを特徴とするシリコ
ンウェハの反り抑制装置。
(2) The device for rapidly cooling a silicon single crystal from a high temperature has a vacuum-tight structure and consists of a heating section and a cooling section separated by a gate valve, and the heating section includes a cylindrical heater and a cooling section. It is arranged in a suspended position at a central position, and includes a heating casing on which the single crystal is placed, and a cooling section that connects a winding mechanism of the heating casing and an inlet and an outlet for cooling gas. A silicon wafer warpage suppressing device comprising:
JP60002426A 1985-01-10 1985-01-10 Method and apparatus for preventing warpage of silicon wafer Pending JPS61161727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60002426A JPS61161727A (en) 1985-01-10 1985-01-10 Method and apparatus for preventing warpage of silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60002426A JPS61161727A (en) 1985-01-10 1985-01-10 Method and apparatus for preventing warpage of silicon wafer

Publications (1)

Publication Number Publication Date
JPS61161727A true JPS61161727A (en) 1986-07-22

Family

ID=11528926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60002426A Pending JPS61161727A (en) 1985-01-10 1985-01-10 Method and apparatus for preventing warpage of silicon wafer

Country Status (1)

Country Link
JP (1) JPS61161727A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000277501A (en) * 1999-03-25 2000-10-06 Japan Science & Technology Corp Chemical vapor deposition system
JP2009010412A (en) * 2008-08-25 2009-01-15 Japan Science & Technology Agency Chemical vapor deposition method
JP2009283954A (en) * 2009-07-09 2009-12-03 Japan Science & Technology Agency Catalyst chemical vapor deposition device and method of producing thin film
CN114875481A (en) * 2022-05-30 2022-08-09 中材人工晶体研究院(山东)有限公司 Physical vapor transport method crystal growth furnace, method for preparing crystal ingot and crystal ingot

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000277501A (en) * 1999-03-25 2000-10-06 Japan Science & Technology Corp Chemical vapor deposition system
JP2009010412A (en) * 2008-08-25 2009-01-15 Japan Science & Technology Agency Chemical vapor deposition method
JP2009283954A (en) * 2009-07-09 2009-12-03 Japan Science & Technology Agency Catalyst chemical vapor deposition device and method of producing thin film
CN114875481A (en) * 2022-05-30 2022-08-09 中材人工晶体研究院(山东)有限公司 Physical vapor transport method crystal growth furnace, method for preparing crystal ingot and crystal ingot

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