JPH0232535A - Manufacture of silicon substrate for semiconductor device - Google Patents
Manufacture of silicon substrate for semiconductor deviceInfo
- Publication number
- JPH0232535A JPH0232535A JP18266888A JP18266888A JPH0232535A JP H0232535 A JPH0232535 A JP H0232535A JP 18266888 A JP18266888 A JP 18266888A JP 18266888 A JP18266888 A JP 18266888A JP H0232535 A JPH0232535 A JP H0232535A
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- internal defect
- heating
- silicon
- internal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 39
- 239000010703 silicon Substances 0.000 title claims abstract description 39
- 239000000758 substrate Substances 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000004065 semiconductor Substances 0.000 title claims description 7
- 229910052736 halogen Inorganic materials 0.000 claims abstract description 6
- 150000002367 halogens Chemical class 0.000 claims abstract description 6
- 229910052724 xenon Inorganic materials 0.000 claims abstract description 4
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 claims abstract description 4
- 230000007547 defect Effects 0.000 abstract description 26
- 238000010438 heat treatment Methods 0.000 abstract description 18
- 239000013078 crystal Substances 0.000 abstract description 8
- 238000001816 cooling Methods 0.000 abstract description 7
- 239000001301 oxygen Substances 0.000 abstract description 7
- 229910052760 oxygen Inorganic materials 0.000 abstract description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 6
- 238000009826 distribution Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 239000002244 precipitate Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008034 disappearance Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 150000002926 oxygen Chemical class 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は、半導体デバイス用シリコン基板の製造方法
に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to a method of manufacturing a silicon substrate for semiconductor devices.
従来の技術
半導体デバイスに用いられるシリコン基板は、はとんど
が引上げ法（ＣＺ法）で育成されたものである。BACKGROUND OF THE INVENTION Most silicon substrates used in conventional semiconductor devices are grown by the pulling method (CZ method).
このＣＺ法で育成されるシリコン単結晶には、通常１０
１８個着程度の酸素不純物が含まれており、そのままの
状態でデバイス製造工程に使用すると、工程中に過飽和
な酸素不純物が析出する。又、この酸素析出物の体積膨
張による歪みで二次的に転位、積層欠陥等が発生する（
以下、これら析出物、転位、積層欠陥等を単に内部欠陥
と称す）。The silicon single crystal grown by this CZ method usually has a crystal grain size of 10
It contains about 18 oxygen impurities, and if used as is in the device manufacturing process, supersaturated oxygen impurities will precipitate during the process. In addition, dislocations, stacking faults, etc. occur secondarily due to distortion due to the volumetric expansion of this oxygen precipitate (
Hereinafter, these precipitates, dislocations, stacking faults, etc. are simply referred to as internal defects).
これらの内部欠陥は、半導体デバイスの特性に大きな影
響を及ぼす。デバイス活性層に欠陥がある場合、リーク
電流の増大、酸化膜耐圧不良等を引き起す。一方、デバ
イス製造工程で導入される汚染不純物のゲッタリング源
となり、デバイス特性が向上する。したがって、内部欠
陥の発生を制御することが重要である。These internal defects greatly affect the characteristics of semiconductor devices. If there is a defect in the device active layer, it causes an increase in leakage current, poor oxide film breakdown voltage, etc. On the other hand, it serves as a gettering source for contaminating impurities introduced during the device manufacturing process, improving device characteristics. Therefore, it is important to control the occurrence of internal defects.
従来、ＣＺ法により育成されたシリコン単結晶はウェハ
に加工されてシリコン基板として、そのままデバイス製
造工程に使用されている。Conventionally, a silicon single crystal grown by the CZ method is processed into a wafer and used as a silicon substrate in a device manufacturing process as it is.
発明が解決しようとする課題
前記のごとく、ＣＺ法で育成されたシリコン基板はその
ままデバイス製造工程に使用すると、シリコン単結晶育
成時に受ける熱履歴により導入された発生核に応じた分
布で内部欠陥が発生する。Problems to be Solved by the Invention As mentioned above, when a silicon substrate grown by the CZ method is used as it is in the device manufacturing process, internal defects are generated in a distribution according to the generated nuclei introduced due to the thermal history received during silicon single crystal growth. Occur.
その結果、内部欠陥は基板内で不均一に発生し、デバイ
ス特性を悪化させていた。As a result, internal defects occur non-uniformly within the substrate, deteriorating device characteristics.
この発明は、前記問題点を解消するための方法を提供す
ることを目的とする。An object of the present invention is to provide a method for solving the above problems.
課題を解決するための手段
この発明は、半導体デバイス用シリコン基板にキセノン
ランプ又はハロゲンランプによる光を照射して１２００
℃以上に加熱した後、常温まで２．２℃／ＳｅＣ以上の
速度で急冷することにある。Means for Solving the Problems This invention provides a method for irradiating a silicon substrate for a semiconductor device with light from a xenon lamp or a halogen lamp.
After heating to a temperature above .degree. C., the material is rapidly cooled to room temperature at a rate of 2.2.degree. C./SeC or above.
この発明は、シリコン基板をデバイス製造工程以前にお
いて、前記のごとく熱処理を施すことにより、デバイス
製造工程でシリコン基板間及びシリコン基板面内均一に
内部欠陥を形成する性質を付与することにある。The present invention is to impart the property of uniformly forming internal defects between silicon substrates and within the surface of the silicon substrate in the device manufacturing process by subjecting the silicon substrate to the heat treatment as described above before the device manufacturing process.
前記熱処理により、シリコン基板の格子間酸素が外方拡
散し表面近傍の格子間Ｍ水濃度が減少する。又、シリコ
ン単結晶育成時に導入される内部欠陥の発生核は温度に
依存する臨界サイズにより、その成長、消滅が左右され
るため、当該シリコン基板の内部欠陥発生核は、そのほ
とんどが縮少、消滅する。加えて、格子間シリコン原子
は拡散によりその濃度が減少し、当該シリコン基板は原
子空孔濃度が高くなる。By the heat treatment, interstitial oxygen in the silicon substrate diffuses outward, and the concentration of interstitial M water near the surface decreases. In addition, since the growth and disappearance of the internal defect nuclei introduced during silicon single crystal growth is influenced by the critical size that depends on temperature, most of the internal defect nuclei in the silicon substrate shrink or disappear. Disappear. In addition, the concentration of interstitial silicon atoms decreases due to diffusion, and the silicon substrate has a high atomic vacancy concentration.
前記熱処理における加熱温度は、１２００℃未満では格
子間酸素の外方拡散及び内部欠陥発生核の消滅に要する
時間が長くなる。If the heating temperature in the heat treatment is less than 1200° C., the time required for the outward diffusion of interstitial oxygen and the disappearance of internal defect generating nuclei becomes long.
又、加熱後は外気に触れる等の手段により常温まで急冷
するが、この急冷処理により冷却中における新たな内部
欠陥の発生核の導入が抑制される。Further, after heating, the material is rapidly cooled down to room temperature by means such as exposure to the outside air, and this rapid cooling process suppresses the introduction of new internal defect generation nuclei during cooling.
ざらに高濃度の原子空孔は当該シリコン基板内に均一に
分布した状態で凍結される。Atomic vacancies with a high concentration are frozen in a uniformly distributed state within the silicon substrate.
又、加熱方法としてキセノンランプ又はハロゲンランプ
を使用するのは、拡散炉に比べより高温に加熱すること
ができ、ざらに昇温速度が大きく加熱時間を短縮できる
ためである。なあ、この光ランプによる加熱は高純度窒
素ガス等の不活性ガス雰囲気で行うことが望ましい。そ
の理由は、格子間酸素の外方拡散を増し、又加熱中の雰
囲気による汚染を少なくすることにある。Moreover, the reason why a xenon lamp or a halogen lamp is used as a heating method is because it can heat to a higher temperature than a diffusion furnace, and has a relatively high temperature increase rate, so that the heating time can be shortened. Incidentally, it is preferable that the heating by this light lamp be performed in an inert gas atmosphere such as high-purity nitrogen gas. The reason is to increase the out-diffusion of interstitial oxygen and to reduce atmospheric contamination during heating.
なお、内部欠陥の発生密度はシリコン基板の加熱温度及
び急冷速度等の処理条件により制御することができる。Note that the density of internal defects can be controlled by processing conditions such as heating temperature and rapid cooling rate of the silicon substrate.
作 用
この発明の実施により熱処理されたシリコン基板は、シ
リコン単結晶育成時に導入された不均一な内部欠陥発生
核は、そのほとんどが消滅し、新たな高濃度の均一に分
布する原子空孔により、シリコン基板はデバイス製造工
程中均−に内部欠陥が発生する。そして、表面近傍のデ
バイス活性領域は、格子間酸素濃度が減少しているため
内部欠陥の発生は皆無となり、いわゆる無欠陥領域（Ｄ
Ｚ層）が形成される。Function: In a silicon substrate heat-treated according to the present invention, most of the non-uniform internal defect generating nuclei introduced during silicon single crystal growth disappear, and are replaced by a new high concentration of uniformly distributed atomic vacancies. Internal defects occur uniformly in silicon substrates during the device manufacturing process. In the device active region near the surface, the interstitial oxygen concentration is reduced, so no internal defects occur, and the so-called defect-free region (D
Z layer) is formed.
発明の効果
この発明は、ＣＺ法で育成されたシリコン基板を、デバ
イス製造工程で使用する前に、高温加熱−急冷の熱処理
を施すことにより、デバイス製造工程においてシリコン
基板間及びシリコン基板面内均一に内部欠陥を形成する
性質を付与することができ、デバイス特性の向上に寄与
できる。Effects of the Invention This invention provides uniformity between silicon substrates and within the silicon substrate surface in the device manufacturing process by subjecting the silicon substrate grown by the CZ method to a heat treatment of high temperature heating and rapid cooling before using it in the device manufacturing process. can be given the property of forming internal defects, contributing to improvement of device characteristics.
実 施 例
実施例１
第１図に示すように、Ｎ２ガスを雰囲気ガスとする石英
容器（１）内に設けた支持具（２）にシリコン基板（３
）を載せ、容器上方には集光用のミラー（４）を有する
ハロゲンランプ（５）を設けてなる光ランプ加熱装置を
使って、次の条件でこの発明を実施した。Examples Example 1 As shown in Figure 1, a silicon substrate (3
) and a halogen lamp (5) having a condensing mirror (4) above the container was used to carry out the invention under the following conditions.
シリコン基板
Ｂドープにより比抵抗１０Ωｃｍとなるように調整した
シリコン単結晶棒を通常の方法でウェハ加工したもの。A silicon single crystal ingot adjusted to have a specific resistance of 10 Ωcm by doping silicon substrate B is wafer-processed using the usual method.
加熱方法
１３００’Ｃで５ ｍｉｎ加熱
冷却方法
大気中冷却
前記実施例による試料と共に比較のため、前記シリコン
基板のままの試料を採り１０００’Ｃで１６ｈｒ熱酸化
後、選択エツチング液（ライト液）で５分間処理して内
部欠陥を調べた。その結果を第２図に示す。そのＡ図は
この発明の実施によるシリコン基板であり、内部欠陥は
表面近傍には皆無でおり、内部のみに均一に発生し、そ
の平均密度Ｇは１０５個々であった。−５８図は従来の
熱処理を施さない場合のシリコン基板であり、内部欠陥
は基板外周に高密度で発生しており、その平均密度は１
０４個着で全体に不均一に発生していた。Heating method Heating at 1300'C for 5 min Cooling method Cooling in air For comparison with the sample from the above example, a sample of the same silicon substrate was taken and thermally oxidized at 1000'C for 16 hours, and then etched with a selective etching solution (light solution). It was processed for 5 minutes and examined for internal defects. The results are shown in FIG. Figure A shows a silicon substrate according to the present invention, in which there were no internal defects near the surface, and they occurred uniformly only inside, and the average density G was 105 defects. Figure -58 shows a silicon substrate without conventional heat treatment, with internal defects occurring at a high density around the periphery of the substrate, with an average density of 1
The problem occurred unevenly throughout the 04 pieces.
実施例２
実施例１におけるシリコン基板と同じものを使って、８
０３メモリー素子を作製した。そして、それらの中から
採った試料についてリーク試験を行った。その結果を第
３図に示す。実線はこの発明の実施例によるもの、破線
は従来のものでおり、この発明によるもの（実線）はリ
ーク不良率が面内均一でおるに対し、従来のもの（破線
）は面内不均一で外周部のリーク不良率が高いことがわ
かる。又、全体的に見てこの発明によるものは従来のも
のに比べてリーク不良率が低いことがわかる。Example 2 Using the same silicon substrate as in Example 1, 8
03 memory element was manufactured. A leak test was then conducted on samples taken from them. The results are shown in FIG. The solid line is the one according to the embodiment of this invention, and the broken line is the conventional one.The leak failure rate of the one according to the present invention (solid line) is uniform within the plane, while the conventional one (broken line) is non-uniform within the plane. It can be seen that the leakage defect rate at the outer periphery is high. Also, it can be seen that overall, the leak failure rate of the device according to the present invention is lower than that of the conventional device.
第１図はこの発明を実施するためのシリコン基板加熱装
置の一例を示す説明図、第２図はシリコン基板の内部欠
陥を示す図面で、Ａ図はこの発明の実施例によるもの、
Ｂ図は従来の非処理のもの、第３図は実施例におけるリ
ーク試験結果を示すグラフである。
１・・・石英容器 ２・・・支持具３・・・シ
リコン基板 ４・・・ミラー５・・・ハロゲンラン
プFIG. 1 is an explanatory diagram showing an example of a silicon substrate heating apparatus for carrying out the present invention, FIG. 2 is a diagram showing internal defects in a silicon substrate, and FIG.
Figure B is a graph showing the results of a conventional non-processed leak test, and Figure 3 is a graph showing the results of a leak test in an example. 1...Quartz container 2...Support 3...Silicon substrate 4...Mirror 5...Halogen lamp
Claims (1)
ハロゲンランプによる光を照射して１２００℃以上に加
熱した後、常温まで２．２℃／ｓｅｃ以上の速度で急冷
することを特徴とする半導体デバイス用シリコン基板の
製造方法。1. A silicon substrate for a semiconductor device, which is characterized in that the silicon substrate for a semiconductor device is irradiated with light from a xenon lamp or a halogen lamp, heated to 1200°C or higher, and then rapidly cooled to room temperature at a rate of 2.2°C/sec or higher. manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18266888A JPH0232535A (en) | 1988-07-21 | 1988-07-21 | Manufacture of silicon substrate for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18266888A JPH0232535A (en) | 1988-07-21 | 1988-07-21 | Manufacture of silicon substrate for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0232535A true JPH0232535A (en) | 1990-02-02 |
Family
ID=16122347
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18266888A Pending JPH0232535A (en) | 1988-07-21 | 1988-07-21 | Manufacture of silicon substrate for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0232535A (en) |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03294740A (en) * | 1990-04-10 | 1991-12-25 | Ebara Res Co Ltd | Heating method of pure or ultra-pure water |
| JPH05275431A (en) * | 1992-03-25 | 1993-10-22 | Mitsubishi Materials Corp | Ig heat treatment method of silicon wafer |
| US6251184B1 (en) | 1997-02-13 | 2001-06-26 | Samsung Electronics Co., Ltd. | Insulating-containing ring-shaped heat shields for czochralski pullers |
| US6340392B1 (en) | 1997-10-24 | 2002-01-22 | Samsung Electronics Co., Ltd. | Pulling methods for manufacturing monocrystalline silicone ingots by controlling temperature at the center and edge of an ingot-melt interface |
| WO2002011196A1 (en) * | 2000-07-28 | 2002-02-07 | Shin-Etsu Handotai Co., Ltd. | Method for manufacturing single-crystal silicon wafers |
| JP2002524852A (en) * | 1998-09-02 | 2002-08-06 | エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド | Ideal oxygen deposition silicon wafer manufacturing method |
| US6485807B1 (en) | 1997-02-13 | 2002-11-26 | Samsung Electronics Co., Ltd. | Silicon wafers having controlled distribution of defects, and methods of preparing the same |
| US6503594B2 (en) | 1997-02-13 | 2003-01-07 | Samsung Electronics Co., Ltd. | Silicon wafers having controlled distribution of defects and slip |
| US6537368B2 (en) | 1997-02-26 | 2003-03-25 | Memc Electronic Materials Spa | Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor |
| JP2003257984A (en) * | 2002-03-05 | 2003-09-12 | Sumitomo Mitsubishi Silicon Corp | Silicon wafer and its manufacturing method |
| US6666915B2 (en) | 1999-06-14 | 2003-12-23 | Memc Electronic Materials, Inc. | Method for the preparation of an epitaxial silicon wafer with intrinsic gettering |
| US6849901B2 (en) | 1998-09-02 | 2005-02-01 | Memc Electronic Materials, Inc. | Device layer of a silicon-on-insulator structure having vacancy dominated and substantially free of agglomerated vacancy-type defects |
| US6896728B2 (en) | 1997-04-09 | 2005-05-24 | Memc Electronic Materials, Inc. | Process for producing low defect density, ideal oxygen precipitating silicon |
| JP2009218620A (en) * | 2009-06-23 | 2009-09-24 | Sumco Corp | Method of manufacturing silicon wafer |
| JP2010004054A (en) * | 1998-09-02 | 2010-01-07 | Memc Electron Materials Inc | Thermally-annealed wafer with improved internal gettering property |
| US8026145B2 (en) | 2005-11-09 | 2011-09-27 | Memc Electronic Materials, Inc. | Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering |
| US8216362B2 (en) | 2006-05-19 | 2012-07-10 | Memc Electronic Materials, Inc. | Controlling agglomerated point defect and oxygen cluster formation induced by the lateral surface of a silicon single crystal during CZ growth |
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| JPS595633A (en) * | 1982-07-02 | 1984-01-12 | Seiko Epson Corp | Manufacture of semiconductor device |
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Cited By (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03294740A (en) * | 1990-04-10 | 1991-12-25 | Ebara Res Co Ltd | Heating method of pure or ultra-pure water |
| JPH05275431A (en) * | 1992-03-25 | 1993-10-22 | Mitsubishi Materials Corp | Ig heat treatment method of silicon wafer |
| US6676753B2 (en) | 1997-02-13 | 2004-01-13 | Samsung Electronics Co., Ltd. | Czochralski pullers for manufacturing monocrystalline silicon ingots, including heat shield having sloped portions |
| US6503594B2 (en) | 1997-02-13 | 2003-01-07 | Samsung Electronics Co., Ltd. | Silicon wafers having controlled distribution of defects and slip |
| US6780238B2 (en) | 1997-02-13 | 2004-08-24 | Samsung Electronics Co., Ltd. | Argon/ammonia rapid thermal annealing for silicon wafers |
| US6409833B2 (en) | 1997-02-13 | 2002-06-25 | Samsung Electronics Co., Ltd. | Insulating-containing ring-shaped heat shields and support members for Czochralski pullers |
| US6251184B1 (en) | 1997-02-13 | 2001-06-26 | Samsung Electronics Co., Ltd. | Insulating-containing ring-shaped heat shields for czochralski pullers |
| US6472040B1 (en) | 1997-02-13 | 2002-10-29 | Samsung Electronics Co., Ltd. | Semi-pure and pure monocrystalline silicon ingots and wafers |
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