JPS61160974A - Manufacture of gto thyristor - Google Patents

Abstract

PURPOSE:To enable the ohmic contact of gate electrodes to be surely formed at the groove bottom, so as to coat the whole surface with an insulation film except at the electrode part, by a method wherein wherein the photoetchings each to provided the main electrode openings and gate electrode openings to the oxide film on a stepped semiconductor substrate are carried out with photo resist films separately superposed. CONSTITUTION:Grooves 7 from the surface of an Si substrate 1 to a p-base layer 3 are formed, and the surface is coated with an oxide film 5. A photo resist film 61 is applied thereon and patterned into cathode electrode openings 10. After another application of a photo resist film 62, apertures 15 are formed at the groove bottoms. This film 62 and the films 61 and 5 beneath the apertures 15 are removed, and a Br-doped P-type polycrystalline Si thin film 16 is pro duced on the surface of the exposed p-base layer 3 and on the remaining film 62. This thin film 61 comes in ohmic contact with the p-base layer. On exfolia tion of the films 61, 62, the portions of thin film 61 thereon are removed, and only the portion of thin film 16 in contact with the p-base layer at the groove 7 bottom is left. When gate electrodes 13, cathode electrodes 12, and anode electrode 14 are formed, a GTO thyristor is completed.

Description

[Detailed description of the invention]

t□□＾w□鴫AJe#し1□1 The present invention relates to a method for manufacturing a GTO thyristor, in which a stepped surface is provided on the surface of a semiconductor plate, and a main electrode and a gate electrode are attached to each surface.

[Prior art and its problems]

GTO thyristors have conventionally been manufactured using the steps shown in FIG. First, using an n-type silicon substrate 1, as shown in FIG. . Next, a silicon oxide film 5 is formed on the surface (Fig. b), a photoresist film 6 is applied thereon (Fig. 0), a pattern of the photoresist film is formed (Fig. d), and the silicon oxide film 5 is etched (Fig. e). Using the remaining oxide film 5 as a mask,
Etching the shape layer 4 and p-type layer 3 to a depth of 30 to 50 #m
Dig trench 7 (Figure f). Next, apply silicon oxide 119!5 to the entire surface again (g
), a photoresist film 6 is applied over the entire surface, and the window 8 is
The oxide film 5 under this window 8 is then removed, and the oxide film 5 is removed one by one using a photo-etching method to form a P layer 9 for ohmic contact with the gate electrode (Fig. h). A cathode electrode opening 10 and a gate electrode opening 11 are formed in (Figure 3), and finally a cathode electrode 12 and a gate electrode 13 are formed by photoetching the A11 layer.
MO is vapor-deposited on the back surface to form an anode electrode 14 (Figure k). However, in this step, after trenches 7 are formed by excavating 30 to 50 p1 of silicon, photo-etching is performed three times in the steps shown in FIG. In this case, since there are steps on the surface of the silicon plate, the patterning may not match <(, and if the patterning in the photoetching process does not match, P
``A mismatch occurs between the EL region 9 and the gate electrode 13, making it impossible to obtain a healthy contact between the gate electrode 13.Also, when forming the cathode electrode opening 10, the photoresist film on the oxide film 5 forms the groove 7.
For example, the oxide film 5 on the portion 15 is removed, exposing the silicon surface, which may lead to deterioration of device characteristics.

[Objective of the Invention] In contrast, the present invention provides a method for manufacturing a GTO thyristor in which mismatching of photoresist patterns is less likely to occur (and in which the bottom surface of the groove can be entirely covered with an insulating film except for the positive pole part). [Summary of the Invention] According to the present invention, after forming a groove reaching from one surface of a semiconductor substrate having four adjacent layers of alternately different conductivity types to a base layer adjacent to a surface layer, the surface is oxidized. The first photoresist film is coated through the first photoresist film, and after removing the oxide film at the location where the main electrode is to be provided by photoetching, the second photoresist film is coated, and the gate electrode is provided at the bottom of the trench by exposure. The second photoresist film at the location is removed, and then, using the remaining second photoresist film as a mask, the first photoresist film and oxide film are removed, and an impurity-containing semiconductor thin film of the same conductivity type as the base layer is formed on the entire surface. is produced at low temperature,
Subsequently, the first and second photoresist films are removed together with the semiconductor thin film thereon, and a gate electrode is formed on the remaining semiconductor thin film.
The above objective is achieved by forming the main electrode on the exposed portion of the surface layer. When this photoresist film is removed, a so-called lift-off method is performed in which the semiconductor thin film thereon is removed, leaving only the semiconductor thin film useful for forming an ohmic contact with the base layer of the gate electrode. As the impurity-containing semiconductor thin film, polycrystalline silicon, which can be produced at low temperatures by vapor deposition or plasma CVD, can be used. DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a part of the process of an embodiment of the present invention. The steps before the process shown here are from Fig. 2 18) to 2
The process is the same as that shown in Figure
covered by. A photoresist film 61 is applied thereon, patterned, and the acid film 5 is removed to form the cathode electrode opening 10.
Subsequently, the photoresist film 62 is applied over the entire surface again, and then exposed to light to form the opening 15 of the photoresist film 62 on the bottom of the groove (Figure b).Next, the opening is formed by plasma etching using the photoresist film 62 as a mask. 1
The photoresist film 61 under the p-base layer 3 and the silicon oxide film 5 are removed by chemical etching, and then the exposed surface of the p base layer 3 and the remaining photoresist film 62 are deposited by vapor deposition or plasma CVD, for example. Generate boron-doped p-type polycrystalline silicon thin film 16 at low temperature (
(Fig. C), this thin film 16 is in ohmic contact with the p base layer. The photoresist films 61 and 62 have a thin film 16 formed at 30°C.
Because it is carried out at a low temperature below 0°C, it remains intact without deterioration. Thereafter, when the resist films 61 and 62 are peeled off, the semiconductor layer 1iais thereon is removed, leaving only the thin film 16 at the bottom of the groove 7 in ohmic contact with the p base layer. Finally, the gate electrode 13 in contact with this thin film 16, the cathode electrode 12 in contact with the exposed part of the n-emitter layer, and the anode electrode 14 bonded to the p-emitter layer 2 are formed in the same manner as explained with reference to FIG. 2(k). Once created, a GTO thyristor is completed (Fig. d). According to this method, an ohmic contact layer for the gate electrode is formed by a lift-off method using a photoresist film 61, 62, so there is no contact between the gate electrode due to pattern misalignment. There is no risk of defects, and the shoulders of the grooves 7 are resist [l! 61 and 62, the oxide film 5 is kept healthy.

【Effect of the invention】

According to the present invention, photo-etching is carried out to provide a main electrode port and a gate electrode port in an oxide film on a semiconductor substrate of a GTO silice having a stepped surface using separate overlapping photoresist films. This method uses the lift-off method to form an intermediate layer for bringing the gate electrode into contact with the base layer, and eliminates essential problems such as reduced patterning accuracy due to steps and poor protection of steps during conventional GTO thyristor manufacturing. Don't be concerned about weaknesses (can be manufactured).

[Brief explanation of the drawing]

FIG. 1 is a sectional view sequentially showing the latter half of the process of an embodiment of the present invention, and FIG. 2 is a sectional view sequentially showing the conventional process. 1: n-type silicon substrate (n base layer), 2: p emitter layer, 3: p base layer, 4: n emitter layer, 5: silicon oxide film, Sl, S: photoresist film, 7+ groove, lO
: cathode electrode opening, 12: cathode electrode, 13: gate electrode, 15 resist film opening, 16: p-type polycrystalline silicon film. rt7 people, i,: ± 6) Mouth ￥1 ”sya 1 figure 112 figure

Claims (1)

[Claims] 1) After forming a trench from one side of the semiconductor having four adjacent layers of alternately different conductivity types to the base layer adjacent to the surface layer, the surface is covered with a first photoresist film via an oxide film, and photoetching is performed. After removing the oxide film at the location where the main electrode is to be provided, a second photoresist film is applied. Using the photoresist film as a mask, the first photoresist film and oxide film are removed, and an impurity-containing semiconductor thin film of the same conductivity type as the base layer is formed on the entire surface at a low temperature. A method for manufacturing a GTO thyristor, which comprises removing the semiconductor thin film together with the upper semiconductor thin film, forming a gate electrode on the remaining semiconductor thin film, and forming a main electrode on the exposed portion of the surface layer.