JPS61160552U - - Google Patents
Info
- Publication number
- JPS61160552U JPS61160552U JP4475485U JP4475485U JPS61160552U JP S61160552 U JPS61160552 U JP S61160552U JP 4475485 U JP4475485 U JP 4475485U JP 4475485 U JP4475485 U JP 4475485U JP S61160552 U JPS61160552 U JP S61160552U
- Authority
- JP
- Japan
- Prior art keywords
- counting means
- task
- counting
- processing unit
- central processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000002159 abnormal effect Effects 0.000 claims 1
- 230000005856 abnormality Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案の一実施例の構成を検出対象
と併せて示したブロツク図、第２図は従来のＣＰ
Ｕの暴走検出装置の構成を検出対象と併せて示し
たブロツク図である。
１：中央処理装置搭載機器、２ａ，２ｂ，２ｃ
：タスク、４：出力回路、５ａ，５ｂ，５ｃ：カ
ウンタ回路、６：中央処理装置暴走検出回路、７
：レジスタ回路、８ａ，８ｂ，８ｃ：表示器、９
：表示回路。なお、各図中同一符号は同一または
相当部分を示す。
Figure 1 is a block diagram showing the configuration of an embodiment of this invention together with the detection target, and Figure 2 is a conventional CP.
FIG. 2 is a block diagram showing the configuration of a U runaway detection device together with a detection target. 1: Central processing unit equipped equipment, 2a, 2b, 2c
: task, 4: output circuit, 5a, 5b, 5c: counter circuit, 6: central processing unit runaway detection circuit, 7
:Register circuit, 8a, 8b, 8c: Display device, 9
:Display circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
を搭載している機器の異常処理の発生を検出する
ものにおいて、前記タスクに対応して設けられ、
それぞれ前記タスクの外部割り込み信号を計数す
ると共に、各タスクが処理の最後に行なう出力命
令によつてリセツトされる複数の計数手段と、こ
れらの計数手段のうち、オーバーフローした計数
手段を検出し、この計数手段に対応するタスクに
異常が発生したことを表示する表示手段とを具備
したことを特徴とする中央処理装置の暴走検出装
置。 In a device for detecting the occurrence of abnormal processing in a device equipped with a central processing unit configured by a plurality of tasks, provided corresponding to the task,
In addition to counting the external interrupt signals of the respective tasks, a plurality of counting means are reset by the output command executed by each task at the end of processing, and among these counting means, an overflowing counting means is detected, and the counting means is detected. 1. A runaway detection device for a central processing unit, comprising display means for displaying that an abnormality has occurred in a task corresponding to the counting means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4475485U JPS61160552U (en) | 1985-03-26 | 1985-03-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4475485U JPS61160552U (en) | 1985-03-26 | 1985-03-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61160552U true JPS61160552U (en) | 1986-10-04 |
Family
ID=30557617
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4475485U Pending JPS61160552U (en) | 1985-03-26 | 1985-03-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61160552U (en) |
-
1985
- 1985-03-26 JP JP4475485U patent/JPS61160552U/ja active Pending
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