JPS6115772U - ceramic wiring board - Google Patents

ceramic wiring board

Info

Publication number
JPS6115772U
JPS6115772U JP10094984U JP10094984U JPS6115772U JP S6115772 U JPS6115772 U JP S6115772U JP 10094984 U JP10094984 U JP 10094984U JP 10094984 U JP10094984 U JP 10094984U JP S6115772 U JPS6115772 U JP S6115772U
Authority
JP
Japan
Prior art keywords
wiring board
ceramic wiring
glaze layer
ceramic
flush
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10094984U
Other languages
Japanese (ja)
Inventor
哲雄 竹岡
律夫 横山
雄一 大津
Original Assignee
日立化成工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立化成工業株式会社 filed Critical 日立化成工業株式会社
Priority to JP10094984U priority Critical patent/JPS6115772U/en
Publication of JPS6115772U publication Critical patent/JPS6115772U/en
Pending legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例になるセラミック絶縁板の拡
大断面図、第2図のa, b,およびCは本考案の他の
一実施例になるセラミック絶縁板の拡犬断面図、第3図
は従来のセラミック絶縁板の断面図、第4図は第3図の
拡大断面図である。 符号の説明、1・・・セラミック基板、2・・・グレー
ズ層、3・・・エッジ部の角、4・・・溝。
FIG. 1 is an enlarged cross-sectional view of a ceramic insulating plate according to an embodiment of the present invention, and FIG. 2 a, b, and C are enlarged cross-sectional views of a ceramic insulating plate according to another embodiment of the present invention. FIG. 3 is a sectional view of a conventional ceramic insulating plate, and FIG. 4 is an enlarged sectional view of FIG. 3. Explanation of symbols: 1...Ceramic substrate, 2...Glaze layer, 3...Corner of edge portion, 4...Groove.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 必要とするグレーズ層の厚さおよび幅に合致するように
形成された溝の中に上面をセラミック基板と同一面上に
なるように平担にグレーズ層を形成してなるセラミック
絶縁板。
A ceramic insulating board in which a glaze layer is formed flat in a groove formed to match the required thickness and width of the glaze layer so that the upper surface is flush with a ceramic substrate.
JP10094984U 1984-07-04 1984-07-04 ceramic wiring board Pending JPS6115772U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10094984U JPS6115772U (en) 1984-07-04 1984-07-04 ceramic wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10094984U JPS6115772U (en) 1984-07-04 1984-07-04 ceramic wiring board

Publications (1)

Publication Number Publication Date
JPS6115772U true JPS6115772U (en) 1986-01-29

Family

ID=30660391

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10094984U Pending JPS6115772U (en) 1984-07-04 1984-07-04 ceramic wiring board

Country Status (1)

Country Link
JP (1) JPS6115772U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992020637A1 (en) * 1991-05-23 1992-11-26 Asahi Kasei Kogyo Kabushiki Kaisha Ceramic board having glaze, manufacturing method therefor, and electronic device using the ceramic board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992020637A1 (en) * 1991-05-23 1992-11-26 Asahi Kasei Kogyo Kabushiki Kaisha Ceramic board having glaze, manufacturing method therefor, and electronic device using the ceramic board
GB2273292A (en) * 1991-05-23 1994-06-15 Asahi Chemical Ind Ceramic board having glaze,manufacture method therefor,and electronic device using the ceramic board

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