JPS61156100U - - Google Patents
Info
- Publication number
- JPS61156100U JPS61156100U JP3908385U JP3908385U JPS61156100U JP S61156100 U JPS61156100 U JP S61156100U JP 3908385 U JP3908385 U JP 3908385U JP 3908385 U JP3908385 U JP 3908385U JP S61156100 U JPS61156100 U JP S61156100U
- Authority
- JP
- Japan
- Prior art keywords
- circuits
- gate circuits
- data
- write
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3908385U JPS61156100U (enExample) | 1985-03-18 | 1985-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3908385U JPS61156100U (enExample) | 1985-03-18 | 1985-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61156100U true JPS61156100U (enExample) | 1986-09-27 |
Family
ID=30546697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3908385U Pending JPS61156100U (enExample) | 1985-03-18 | 1985-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61156100U (enExample) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60554A (ja) * | 1983-06-16 | 1985-01-05 | Toshiba Corp | メモリ制御装置 |
-
1985
- 1985-03-18 JP JP3908385U patent/JPS61156100U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60554A (ja) * | 1983-06-16 | 1985-01-05 | Toshiba Corp | メモリ制御装置 |
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