JPS6115249A - Ｔｌｂ制御方式 - Google Patents

Ｔｌｂ制御方式

Info

Publication number
JPS6115249A
JPS6115249A JP59135906A JP13590684A JPS6115249A JP S6115249 A JPS6115249 A JP S6115249A JP 59135906 A JP59135906 A JP 59135906A JP 13590684 A JP13590684 A JP 13590684A JP S6115249 A JPS6115249 A JP S6115249A
Authority
JP
Japan
Prior art keywords
entry
page
tlb
bit
modify
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59135906A
Other languages
English (en)
Japanese (ja)
Other versions
JPH024016B2 (cs
Inventor
Kazutoshi Eguchi
江口　和俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59135906A priority Critical patent/JPS6115249A/ja
Priority to US06/749,866 priority patent/US4731740A/en
Publication of JPS6115249A publication Critical patent/JPS6115249A/ja
Publication of JPH024016B2 publication Critical patent/JPH024016B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP59135906A 1984-06-30 1984-06-30 Ｔｌｂ制御方式 Granted JPS6115249A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59135906A JPS6115249A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式
US06/749,866 US4731740A (en) 1984-06-30 1985-06-28 Translation lookaside buffer control system in computer or virtual memory control scheme

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59135906A JPS6115249A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式

Publications (2)

Publication Number Publication Date
JPS6115249A true JPS6115249A (ja) 1986-01-23
JPH024016B2 JPH024016B2 (cs) 1990-01-25

Family

ID=15162590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59135906A Granted JPS6115249A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式

Country Status (1)

Country Link
JP (1) JPS6115249A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992005494A1 (fr) * 1990-09-20 1992-04-02 Fujitsu Limited Systeme equipe d'un processeur et procede de conversion d'adresses dans ledit systeme
CN1077510C (zh) * 1994-09-28 2002-01-09 索尼公司 打印方法和图象打印装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139387A (ja) * 1982-02-12 1983-08-18 Hitachi Ltd アドレス変換方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139387A (ja) * 1982-02-12 1983-08-18 Hitachi Ltd アドレス変換方式

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992005494A1 (fr) * 1990-09-20 1992-04-02 Fujitsu Limited Systeme equipe d'un processeur et procede de conversion d'adresses dans ledit systeme
CN1077510C (zh) * 1994-09-28 2002-01-09 索尼公司 打印方法和图象打印装置

Also Published As

Publication number Publication date
JPH024016B2 (cs) 1990-01-25

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