JPS61150047A - Remote supervisory control device - Google Patents

Remote supervisory control device

Info

Publication number
JPS61150047A
JPS61150047A JP27174784A JP27174784A JPS61150047A JP S61150047 A JPS61150047 A JP S61150047A JP 27174784 A JP27174784 A JP 27174784A JP 27174784 A JP27174784 A JP 27174784A JP S61150047 A JPS61150047 A JP S61150047A
Authority
JP
Japan
Prior art keywords
memory
sub
section
memory section
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27174784A
Other languages
Japanese (ja)
Inventor
Hiroshi Yamamoto
浩 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP27174784A priority Critical patent/JPS61150047A/en
Publication of JPS61150047A publication Critical patent/JPS61150047A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To use effectively a main memory area by providing a sub-memory. CONSTITUTION:A sub-memory section C5 is provided in addition to a main memory section A6 and a program of each task is stored in the sub-memory. The sub-memory consists of a nonvolatile memory or the like. When a program logic of the main memory section A6 desires to refer to a table of the sub- memory C5, a table address of a memory section D9 desired to be read is set to an address introduction area of a sub-input interface section D5. A sub microprocessor D10 uses the sub input interface section D5 to read the content of the address introduction area, and the content of the table in several BYTE several tens of BYTEs is set to the data introduction area of a sub-output interface section D6 while taking the requested address as a head. The program logic of a main memory section A6 reads it.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は、遠方監視制御装置、特に複数の被制御所装置
に対応する制御所遠方監視制御所内の監視制御処理ユニ
ットに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a remote monitoring and control device, and particularly to a monitoring and control processing unit in a remote monitoring and control center that supports a plurality of controlled station devices.

[発明の技術的背景] 第2図は従来の遠方監視制御装置の監視制御処理ユニッ
トの構成を示す図である。前記監視制御処理ユニットA
1は、監視制御情報量が多く、マイクロプロセッサ部A
2にてアクセスできるメモリ容量では不足なために、複
数のメモリ部へ6〜A1oを用いて、メモリ部コントロ
ールプログラム及びタスク毎に分かれるプログラムを夫
々格納させている。前記メモリ部コントロールプログラ
ムはオペレーティングシステムにより、前記タスク毎に
分かれるプログラムを起動させる前に、各プログラムが
前記複数のメモリ部へ6〜A1oのどこに格納させてい
るかを調べ、該当メモリ部を活かしてから、前記タスク
毎に分かれるプログラムを起動させるようにしている。
[Technical Background of the Invention] FIG. 2 is a diagram showing the configuration of a monitoring control processing unit of a conventional remote monitoring and control device. The supervisory control processing unit A
1 has a large amount of monitoring and control information, and the microprocessor section A
Since the memory capacity that can be accessed by 2 is insufficient, a plurality of memory units 6 to A1o are used to store the memory unit control program and programs divided for each task, respectively. The memory section control program uses the operating system to check where each program is stored in the plurality of memory sections from 6 to A1o, before starting the programs divided for each task, and utilizes the corresponding memory section. , a program is started that is divided for each task.

入力インターフェイス部A3は操作スイッチの入力を、
又、出力インターフェイス部A4はランプ表示出力及び
LED表示出力用に使用している。
The input interface section A3 accepts input from the operation switch.
Further, the output interface section A4 is used for lamp display output and LED display output.

前記複数のメモリ部As”Acの内、前記オペレーティ
ングシステム及び前記メモリ部コントロールプログラム
の格納されているメモリ部へ6以外の各メモリ部A7〜
Asは、全て同じメモリ空間を使用している。
Among the plurality of memory sections As''Ac, each of the memory sections A7 to 6 other than 6 stores the operating system and the memory section control program.
As all use the same memory space.

[背景技術の問題点] 第3図は従来のメモリ部のメモリマツプを示すものであ
るが、メモリ部A7〜A1oのように同じメモリ空間を
切換えて使用すると、前記メモリ部A7〜A1oにて使
用できないメモリエリアが非常に無駄となり、複数のメ
モリ部A7〜A1oを使用することでコストが高くなる
[Problems with the Background Art] FIG. 3 shows a memory map of a conventional memory section, but when the same memory space is switched and used as in the memory sections A7 to A1o, the memory space used in the memory sections A7 to A1o is The memory area that cannot be used is extremely wasted, and the use of a plurality of memory sections A7 to A1o increases costs.

又、同じメモリ空間を使用していることにより、プログ
ラム作成やデバッグ及びメンテナンスが非常に難しいと
いう欠点があった。
In addition, since the same memory space is used, program creation, debugging, and maintenance are extremely difficult.

[発明の目的] 本発明は上記問題点を解決するためになされたものであ
り、簡単にメモリ拡張・メモリ内容変更が可能な遠方監
視制御装置を提供することを目的としている。
[Object of the Invention] The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to provide a remote monitoring and control device in which memory expansion and memory contents can be easily changed.

[発明の概要] 本発明では、サブメモリ部を用いることにより複数のメ
モリ部を使用せずに、メモリエリアを有効に使用できる
ようにするものである。
[Summary of the Invention] According to the present invention, by using a sub-memory section, a memory area can be used effectively without using a plurality of memory sections.

[発明の実施例] 以下図面を参照して実施例を説明する。第1図は本発明
による監視制御処理ユニットの一実施例の構成図である
[Embodiments of the Invention] Examples will be described below with reference to the drawings. FIG. 1 is a configuration diagram of an embodiment of a supervisory control processing unit according to the present invention.

第1図においては、メモリ部A6、C5の構成のみが異
なり、その他は第2図図示従来例と同一である。メモリ
部A6 、Csの構成としては、従来の複数のメモリ部
へ6〜Aaが一つになり、サブメモリ部C5が追加され
たが、このサブメモリ部C5はサブマイクロプロセッサ
内蔵型となっている。
In FIG. 1, only the configurations of memory sections A6 and C5 are different, and the rest is the same as the conventional example shown in FIG. As for the structure of the memory sections A6 and Cs, the conventional multiple memory sections 6 to Aa have been combined into one, and a sub-memory section C5 has been added, but this sub-memory section C5 has a built-in sub-microprocessor. There is.

以下説明のためにメモリ部へ6をメインメモリ部A6と
言う(メモリ部A6とメインメモリ部へ6は同じ意味と
する)。
For the sake of explanation below, the memory section 6 will be referred to as the main memory section A6 (the memory section A6 and the main memory section 6 have the same meaning).

先ず、メインメモリ部へ6のプログラムロジックにてサ
ブメモリ部C5のテーブルを参照したい時は、サブ入力
インターフェイス部D5のアドレス紹介エリアに、読み
込みたいメモリ部D9のテーブルアドレスをセットする
。サブマイクロプロセッサD10は、サブ入力インター
フェイス部D5にてアドレス紹介エリアの内容を読み込
み、要求されたアドレスを先頭にして、数BYTE〜数
十BYTEのテーブルの内容をサブ出力インターフェイ
ス部D6のデータ紹介エリアにセットする。
First, when it is desired to refer to the table in the sub-memory section C5 in the program logic 6 to the main memory section, the table address of the memory section D9 to be read is set in the address introduction area of the sub-input interface section D5. The sub-microprocessor D10 reads the contents of the address introduction area in the sub-input interface section D5, and, with the requested address at the beginning, transfers the contents of the table of several bytes to tens of bytes to the data introduction area of the sub-output interface section D6. Set to .

前記メインメモリ部へ6のプログラムロジックでは、サ
ブ出力インターフェイス部D6より必要とするデータを
読み込む。これにより、従来の第2図で示すメモリ部A
7〜Aηのメモリのいずれかを活かして、そのメモリの
内容を読む代りに、サブメモリ部C5より必要なデータ
を取込んで処理を行なう。
In the program logic 6 for the main memory section, necessary data is read from the sub output interface section D6. As a result, the conventional memory section A shown in FIG.
Instead of reading the contents of the memory by utilizing any of the memories 7 to Aη, necessary data is fetched from the sub-memory section C5 and processed.

[発明の効果] 以上説明した如く本発明によれば、従来に比べ、メモリ
部の数を減すことができ、コストを押さえられ、なおか
つ、サブメモリ部のメモリを不揮発性メモリにすること
で、メモリ内容の変更が非常に簡単に変更可能な遠方監
視制御装置を提供できる。
[Effects of the Invention] As explained above, according to the present invention, the number of memory sections can be reduced compared to the conventional art, and costs can be suppressed, and the memory of the sub-memory section can be made non-volatile memory. , it is possible to provide a remote monitoring and control device in which memory contents can be changed very easily.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による遠方監視制御装置に適用される監
視制御処理ユニットの一実施例構成図、第2図は従来の
監視制御処理ユニットの構成を示すブロック図、第3図
は従来の監視制御処理ユニットのメモリマツプを示す図
である。 A1・・・監視制御処理ユニット A2・・・マイクロプロセッサ部 A3・・・入力インターフェイス部 A4・・・出力インターフエイス部 へ6〜A10・・・メモリ部  C5・・・サブメモリ
部D5・・・サブ入力インターフェイス部D6・・・サ
ブ出力インターフェイス部D9・・・メモリ部 Dlo・・・サブマイクロプロセッサ (7317)代理人 弁理士 則近憲佑(他1名) 第1図 A1 第2図 づ1 第3臥
FIG. 1 is a configuration diagram of an embodiment of a supervisory control processing unit applied to a remote monitoring and control device according to the present invention, FIG. 2 is a block diagram showing the configuration of a conventional supervisory control processing unit, and FIG. 3 is a block diagram of a conventional supervisory control processing unit. FIG. 3 is a diagram showing a memory map of the control processing unit. A1... Supervisory control processing unit A2... Microprocessor section A3... Input interface section A4... To output interface section 6-A10... Memory section C5... Sub memory section D5... Sub input interface section D6...Sub output interface section D9...Memory section Dlo...Sub microprocessor (7317) Agent Patent attorney Kensuke Norichika (and 1 other person) Figure 1 A1 Figure 2 Zu1 3rd bed

Claims (1)

【特許請求の範囲】[Claims] マイクロプロセッサと入出力インターフェイス部及びメ
モリ部とを備え、オペレーティングシステムによってコ
ントロールプログラム及びタスク毎のプログラムを起動
させて入力情報を処理する遠方監視制御装置において、
メインメモリ部の他にマイクロプロセッサ内蔵のサブメ
モリ部を設けたことを特徴とする遠方監視制御装置。
A remote monitoring and control device that includes a microprocessor, an input/output interface unit, and a memory unit, and processes input information by starting a control program and a program for each task using an operating system,
A remote monitoring and control device characterized in that a sub-memory section with a built-in microprocessor is provided in addition to a main memory section.
JP27174784A 1984-12-25 1984-12-25 Remote supervisory control device Pending JPS61150047A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27174784A JPS61150047A (en) 1984-12-25 1984-12-25 Remote supervisory control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27174784A JPS61150047A (en) 1984-12-25 1984-12-25 Remote supervisory control device

Publications (1)

Publication Number Publication Date
JPS61150047A true JPS61150047A (en) 1986-07-08

Family

ID=17504267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27174784A Pending JPS61150047A (en) 1984-12-25 1984-12-25 Remote supervisory control device

Country Status (1)

Country Link
JP (1) JPS61150047A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4955586A (en) * 1988-04-08 1990-09-11 Mitsubishi Jukogyo Kabushiki Kaisha Apparatus for treating slurry by gas-liquid contact method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4955586A (en) * 1988-04-08 1990-09-11 Mitsubishi Jukogyo Kabushiki Kaisha Apparatus for treating slurry by gas-liquid contact method

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