JPS61143380U - - Google Patents

Info

Publication number
JPS61143380U
JPS61143380U JP2550085U JP2550085U JPS61143380U JP S61143380 U JPS61143380 U JP S61143380U JP 2550085 U JP2550085 U JP 2550085U JP 2550085 U JP2550085 U JP 2550085U JP S61143380 U JPS61143380 U JP S61143380U
Authority
JP
Japan
Prior art keywords
transistor
base
supplied
bright pulse
television signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2550085U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2550085U priority Critical patent/JPS61143380U/ja
Publication of JPS61143380U publication Critical patent/JPS61143380U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例に係るブライトパル
ス加算回路の回路構成図、第2図は従来のブライ
トパルス加算回路の回路構成図である。 20……テレビジヨン信号、21〜24……ト
ランジスタ、30……ブライトパルス、40……
スイツチング信号、50……加算出力。
FIG. 1 is a circuit diagram of a bright pulse addition circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional bright pulse addition circuit. 20...Television signal, 21-24...Transistor, 30...Bright pulse, 40...
Switching signal, 50...addition output.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] テレビジヨン信号がベースに供給される第1の
トランジスタと、この第1のトランジスタと共に
差動アンプを構成する第2のトランジスタと、こ
の第2のトランジスタのベースにエミツタが接続
されブライトパルスがベースに供給される第3の
トランジスタと、この第3のトランジスタのベー
スにコレクタが接続される第4のトランジスタと
を具備し、前記第4のトランジスタを導通・非導
通制御することにより、上記差動アンプにおける
上記テレビジヨン信号へのブライトパルスの重畳
動作の停止・実行を行わしめることを特徴とする
ブライトパルス加算回路。
A first transistor whose base is supplied with a television signal, a second transistor which forms a differential amplifier together with this first transistor, and an emitter connected to the base of this second transistor and whose base is supplied with a bright pulse. The differential amplifier includes a third transistor supplied and a fourth transistor whose collector is connected to the base of the third transistor, and controls conduction/non-conduction of the fourth transistor. A bright pulse addition circuit characterized in that it stops and executes an operation of superimposing a bright pulse on the television signal.
JP2550085U 1985-02-26 1985-02-26 Pending JPS61143380U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2550085U JPS61143380U (en) 1985-02-26 1985-02-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2550085U JPS61143380U (en) 1985-02-26 1985-02-26

Publications (1)

Publication Number Publication Date
JPS61143380U true JPS61143380U (en) 1986-09-04

Family

ID=30520626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2550085U Pending JPS61143380U (en) 1985-02-26 1985-02-26

Country Status (1)

Country Link
JP (1) JPS61143380U (en)

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