JPS61143187U

JPS61143187U -

Info

Publication number: JPS61143187U
Application number: JP2536785U
Authority: JP
Priority date: 1985-02-23
Filing date: 1985-02-23
Publication date: 1986-09-04

Description

[Brief explanation of drawings]

第１図は本考案水平位相調節回路の実施の一例
を示す回路図、第２図は背景技術を説明するため
の水平偏向回路の回路ブロツク図、第３図は同期
信号、フライバツクパルス及び基準三角波の波形
図、第４図は水平位相調節回路の従来例を示す回
路図である。符号の説明、１……微分回路、２……積分回路
、ＶＲ……位相調節手段（可変抵抗器）。 Fig. 1 is a circuit diagram showing an example of the implementation of the horizontal phase adjustment circuit of the present invention, Fig. 2 is a circuit block diagram of a horizontal deflection circuit for explaining the background technology, and Fig. 3 is a circuit diagram showing a synchronization signal, a flyback pulse, and a reference. A waveform diagram of a triangular wave, FIG. 4 is a circuit diagram showing a conventional example of a horizontal phase adjustment circuit. Explanation of symbols: 1...Differentiating circuit, 2...Integrator circuit, VR...Phase adjustment means (variable resistor).

Claims

[Claims for Utility Model Registration] A differentiating circuit for differentiating a flyback pulse, an integrating circuit for integrating the flyback pulse, and synthesizing the output of the differentiating circuit and the output of the integrating circuit by a phase adjustment operation. A horizontal phase adjustment circuit comprising: phase adjustment means for changing the ratio;