JPS61139082A - Semiconductor light-emitting device - Google Patents

Semiconductor light-emitting device

Info

Publication number
JPS61139082A
JPS61139082A JP59262332A JP26233284A JPS61139082A JP S61139082 A JPS61139082 A JP S61139082A JP 59262332 A JP59262332 A JP 59262332A JP 26233284 A JP26233284 A JP 26233284A JP S61139082 A JPS61139082 A JP S61139082A
Authority
JP
Japan
Prior art keywords
layer
inp
layers
current stopping
current blocking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59262332A
Other languages
Japanese (ja)
Inventor
Masato Kondo
真人 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59262332A priority Critical patent/JPS61139082A/en
Publication of JPS61139082A publication Critical patent/JPS61139082A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

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  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To obtain high luminous efficiency by forming constitution having buried type hetero-junction structure in which current stopping layers compensat ed by adding manganese are shaped on both the right side and the left side of a partially formed active layer. CONSTITUTION:The title device has buried type hetero-junction structure in which current stopping layers compensated by adding Mn are shaped on both the right side and the left side of a partially formed active layer. When high- resistance InP layers 11 are grown as the current stopping layers and currents are constricted, the trouble of the turn-ON of a thyristor in conventional P-N-P-N structure is eliminated, and currents do not leak from the current stopping layers, thus acquiring a buried type laser having high efficiency. A P-type impurity, such as Cd, Zn, Be, Mn, etc. is added to compensate said layers in order to shape the high-resistance InP layers 11 because InP having high purity displays an N-type under the state of non-addition, but Mn among them has characteristics in which it is difficult to be oxidized, hardly diffuses in the solid phase, has low toxicity, has a large acceptor level (approximately 230meV) and has low vapor pressure in the vicinity of the temperature of the growth of a liquid layer.

Description

【発明の詳細な説明】 C産業上の利用分野コ 本発明は半導体発光装置に係り、特に低しきい値電流を
もった半導体レーザ装置等に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor laser device having a low threshold current.

最近、光伝送が脚光を浴びており、その光源として半導
体レーザや発光ダイオードが利用されている。
Recently, optical transmission has been in the spotlight, and semiconductor lasers and light emitting diodes are used as light sources.

これらの光源はm−v連化合物半導体のヘテロ接合構造
から般り、そのうち、半導体レーザでは波長0.7〜0
.9 p m帯のAlGaAs/GaAs (活性層/
基板)や波長1〜1.5um帯のInGaAs P /
 In Pが著名で、特に長波長帯のInGaAs P
 / In Pは光伝送用光源の本命とみなさている。
These light sources generally have a heterojunction structure of m-v compound semiconductors, and semiconductor lasers have a wavelength of 0.7 to 0.
.. 9 pm band AlGaAs/GaAs (active layer/
substrate) and InGaAs P/in the wavelength band of 1-1.5um
InP is famous, especially InGaAs P in the long wavelength band.
/ In P is regarded as the favorite light source for optical transmission.

このような半導体レーザにおいて、基板上にストライプ
状に設けられた活性層の側面をクラッド層で覆った、低
いしきい値電流で高出力、高発光効率が得られる埋め込
み型構造が知られているが、これらの半導体レーザは出
来るだけ高性能化されることが要望されている。
In such semiconductor lasers, a buried structure is known, in which the side surfaces of an active layer provided in a stripe shape on a substrate are covered with a cladding layer, which provides high output and high luminous efficiency with a low threshold current. However, there is a demand for these semiconductor lasers to have as high performance as possible.

[従来の技術] 第5図はこのような埋め込み型半導体レーザの一例とし
て、InGaAs P / In P半導体レーザ装置
の概要断面図を示しており、1はn” −InP基板。
[Prior Art] FIG. 5 shows a schematic cross-sectional view of an InGaAs P/In P semiconductor laser device as an example of such a buried semiconductor laser, and 1 indicates an n''-InP substrate.

2はn−InPバッファ層、3はn −InGaAs 
P活性層、4はp−1nPクラッド層、5はp −In
GaAs Pキャ・ノブ層、6はp−InP層(電流阻
止層)、7はn−1nP層(電流阻止層)、8は5i0
2膜(二酸化シリコン膜:絶縁膜)、9は生電極、10
は一電極である。
2 is n-InP buffer layer, 3 is n-InGaAs
P active layer, 4 p-1nP cladding layer, 5 p-In
GaAs P layer, 6 is p-InP layer (current blocking layer), 7 is n-1nP layer (current blocking layer), 8 is 5i0
2 film (silicon dioxide film: insulating film), 9 is raw electrode, 10
is one electrode.

レーザ発光はn −1nGaAs P活性層3で行なわ
れて、両側に電流阻止層としてn−InP層7とp −
InP層6を形成し、上下電極間にはこの電流阻止層を
介してpnpn接合が形成されている。このようにすれ
ば、n−InP層7とp −InP層6とが逆接合とな
って、注入電流が活性層に集中(電流狭窄)し、電流阻
止層には電流は流れずに、上記のように低発振しきい値
電流が得られるものである。
Laser emission is performed in an n-1nGaAsP active layer 3, and an n-InP layer 7 and a p-InP layer 7 are formed on both sides as current blocking layers.
An InP layer 6 is formed, and a pnpn junction is formed between the upper and lower electrodes via this current blocking layer. In this way, the n-InP layer 7 and the p-InP layer 6 form a reverse junction, and the injected current is concentrated in the active layer (current confinement), and the current does not flow in the current blocking layer. A low oscillation threshold current can be obtained as shown in FIG.

[発明が解決しようとする問題点] ところが、このような埋め込み型構造を作成する場合に
は、n−InPバッファ層2.  n−InGaAsP
活性層3.p−4nPクラッド層4.  ’Q  In
GaAsPキャップ眉5を順次に液層または気相でエピ
タキシャル成長した後、中央部分をメサ状に残して両側
をエツチング除去し、再び第2回目のエピタキシャル成
長して、p−rnP層6とn−InP層7とを積層する
形成方法が採られている。
[Problems to be Solved by the Invention] However, when creating such a buried structure, the n-InP buffer layer 2. n-InGaAsP
Active layer 3. p-4nP cladding layer 4. 'Q In
After the GaAsP cap layer 5 is epitaxially grown in a liquid or gas phase, the central portion is left in a mesa shape and both sides are etched away, and a second epitaxial growth is performed to form a p-rnP layer 6 and an n-InP layer. A forming method is adopted in which 7 and 7 are laminated.

しかし、n−1nP電流阻止層7とp −InP電流阻
止層6の接合面を、ちょうどn −InGaAs P活
性層3の位置と一致させることは非常に困難であり、そ
のため、n−InP層7とp−InP層6との接合面が
移動して、第5図に示している矢印のような漏れ(リー
ク)径路ができる。
However, it is very difficult to align the junction surface between the n-1nP current blocking layer 7 and the p-InP current blocking layer 6 exactly with the position of the n-InGaAsP active layer 3, and therefore, the n-InP layer 7 The bonding surface between the p-InP layer 6 and the p-InP layer 6 moves, creating a leakage path as shown by the arrow in FIG.

一方、この埋め込み型構造において、生電極9から一電
極10までの電流阻止層を通る径路を考えると、上記の
ように、その部分はpnpn構造で、これはサイリスク
と見なせる。従って、矢印のリーク径路によるリーク電
流は、サイリスクのゲート部分に注入される状態になり
、そのサイリスクをターンオンする働きをしてしまう。
On the other hand, in this embedded structure, if we consider the path passing through the current blocking layer from the raw electrode 9 to the one electrode 10, that part has a pnpn structure as described above, and this can be considered as a cyrisk. Therefore, the leakage current due to the leakage path shown by the arrow is injected into the gate portion of the thyrisk, and serves to turn on the thyrisk.

そうすると、電流阻止が不完全なものとなって、その結
果、注入電流の増加に伴なう発光効率の低下をもたらす
と云う大きな欠点がある。
In this case, there is a major drawback in that current blocking becomes incomplete, resulting in a decrease in luminous efficiency as the injection current increases.

本発明は、このような欠点を解消させた構造の半導体発
光装置を提案するものである。
The present invention proposes a semiconductor light emitting device having a structure that eliminates these drawbacks.

[問題点を解決するための手段] その問題は、部分的に設けられた活性層の左右両側に、
Mn (マンガン)を添加して補償をおこなった電流阻
止層を設けた埋め込み型ヘテロ接合構造を有する半導体
発光装置によって解決される。
[Means for solving the problem] The problem is that on both the left and right sides of the partially provided active layer,
This problem is solved by a semiconductor light emitting device having a buried heterojunction structure provided with a current blocking layer which is compensated by adding Mn (manganese).

例えば、n −InGaAs Pからなる活性層の左右
両側に、Mn (マンガン)を添加して補償をおこなっ
たInP電流電流層止層けた埋め込み型ヘテロ接合構造
を有する半導体発光装置を作成することによって解決さ
れる。
For example, this problem can be solved by creating a semiconductor light-emitting device having a buried heterojunction structure with an InP current stop layer, which is compensated by adding Mn (manganese) to both the left and right sides of an active layer made of n-InGaAsP. be done.

〔作用] 即ち、本発明では、従来のようなpn接合の逆特性を利
用する電流阻止層を形成せずに、絶縁物に近似する高抵
抗の電流阻止層を形成するものである。
[Function] That is, in the present invention, a high-resistance current blocking layer similar to an insulator is formed without forming a current blocking layer that utilizes the reverse characteristics of a pn junction as in the conventional case.

化合物半導体において、高抵抗層の形成は単体の半導体
(例えばシリコンやゲルマニウム)に比べて容易ではな
い。しかし、例えば、無添加でn型を示すInPに、M
nを添加して補償(compensa te)すれば高
抵抗となり、このような電流阻止層を設けることができ
る。
In compound semiconductors, forming a high-resistance layer is not easy compared to forming a single semiconductor (eg, silicon or germanium). However, for example, M
If n is added to compensate, the resistance becomes high, and such a current blocking layer can be provided.

そうすると、電流阻止層によるリーク径路がなくなって
、リーク電流が発生せず、高い発光効率が得られる。
In this case, there is no leakage path due to the current blocking layer, no leakage current is generated, and high luminous efficiency can be obtained.

[実施例] 以下2図面を参照して実施例によって詳細に説明する。[Example] Examples will be described in detail below with reference to two drawings.

第1図は本発明にかかるInGaAs P / In 
P半導体レーザ装置の構造断面図を示しており、11は
Mn (マンガン)を添加した高抵抗p−−InP層で
、他の記号は第5図と同一部材に同一記号を付しである
FIG. 1 shows InGaAs P/In according to the present invention.
A cross-sectional view of the structure of a P semiconductor laser device is shown, in which reference numeral 11 denotes a high-resistance p--InP layer doped with Mn (manganese), and other symbols are the same as those in FIG. 5 with the same symbols.

このように、高抵抗InP層11を電流阻止層として成
長して電流狭窄すると、従来のpnpn構造におけるサ
イリスタのターンオンの問題がなくなり、電流阻止層か
らのリークがな(なって、高い効率の埋め込み型レーザ
が得られる。
In this way, by growing the high-resistance InP layer 11 as a current blocking layer and confining the current, the problem of turn-on of the thyristor in the conventional pnpn structure is eliminated, and leakage from the current blocking layer is eliminated (thereby, high efficiency burying is achieved). type laser is obtained.

高抵抗InP層11を形成するためには、無添加で高純
度なInPはn型を示すため、Cd (カドミウム) 
、 Zn (亜鉛) 、 Be (ベリリウム)、Mn
などのp型不純物を添加して補償するが、そのうち、M
nは酸化され難(、固相中での拡散が小さく、毒性が低
く、アクセプタ準位(約230meV)が大きく、且つ
、液層成長温度付近での蒸気圧が低いと云う特徴をもっ
ており、最も適した添加物である。
In order to form the high-resistance InP layer 11, Cd (cadmium
, Zn (zinc), Be (beryllium), Mn
It is compensated by adding p-type impurities such as M
n has the characteristics of being difficult to oxidize (low diffusion in the solid phase, low toxicity, large acceptor level (approximately 230 meV), and low vapor pressure near the liquid layer growth temperature, and is the most It is a suitable additive.

第2図はInPに対するMnの添加特性を図示しており
、横軸はMnO液相組成比、縦軸はInPの正孔濃度で
ある。図に示すように、無添加n型InPの電子濃度(
残留ドナー濃度)を10 ”/cd1程度と低く抑えれ
ば、液層成長用メルト中のMnの液相組成比が約10−
5原子数%で、正孔濃度が10/−程度の高抵抗なp−
−InP層が、再現性良く液層成長される。正孔の移動
度は約100C11!/ V、Secであるから、この
正孔濃度では、抵抗率100Ω口程度の高抵抗なInP
層が得られる。
FIG. 2 illustrates the addition characteristics of Mn to InP, where the horizontal axis represents the MnO liquid phase composition ratio and the vertical axis represents the hole concentration of InP. As shown in the figure, the electron concentration (
If the residual donor concentration (residual donor concentration) is kept low at around 10"/cd1, the liquid phase composition ratio of Mn in the melt for liquid layer growth will be approximately 10"/cd1.
High resistance p- with 5 atomic % and hole concentration of about 10/-
- An InP layer is grown in a liquid layer with good reproducibility. The mobility of holes is about 100C11! / V, Sec, so at this hole concentration, InP has a high resistivity of about 100Ω.
You get layers.

上記の液層成長用メルトを作成するには、1gのInに
対して0.2μgのMnを加える。それには、低濃度の
母合金を作って、希釈すればよい。
To create the above melt for liquid layer growth, 0.2 μg of Mn is added to 1 g of In. To do this, you can create a low-concentration master alloy and dilute it.

次に、第3図(a)〜(C)はその形成工程順断面図を
示しており、まず、第3図(a)に示すように、Sn(
錫)添加(100)面をもったn” −1nP基板1上
に、液層エピタキシャル成長法にて、Sn添加のn−I
nPバッファ層2.無添加のn −1nGaAs P活
性層3.Cd添加のp−InPクラッド層4.Zn添加
のp −1nGaAs Pキャップ層5を順次に成長す
る。これが第1回目の液層エピタキシャル成長である。
Next, FIGS. 3(a) to 3(C) show cross-sectional views in the order of the formation process. First, as shown in FIG. 3(a), Sn(
Sn-doped n-I was grown by liquid layer epitaxial growth on an n''-1nP substrate 1 with a tin-doped (100) plane.
nP buffer layer 2. Additive-free n −1nGaAs P active layer 3. Cd-doped p-InP cladding layer 4. A Zn-doped p -1nGaAs P cap layer 5 is sequentially grown. This is the first liquid layer epitaxial growth.

次いで、同図中)に示すように、中央部に幅5μmのS
iO□膜12のストライプマスクを設けた後、両側の上
記成長層をInP基板1に達するまでエツチングして、
メサ状に形成する。このメサエッチングはO02%臭素
を含むメタノール液で、約5分間おこなう。
Next, as shown in (in the same figure), a 5 μm wide S is formed in the center.
After providing a stripe mask of the iO□ film 12, the growth layers on both sides are etched until they reach the InP substrate 1.
Form into a mesa shape. This mesa etching is performed for about 5 minutes using a methanol solution containing O2% bromine.

次いで、同図(C)に示すように、その5i02膜12
マスクをそのままにして、上記した液層成長用メルト(
Mn添加InP)で第2回目の液層エピタキシャル成長
して、選択的にp−−4nP層11からなる電流阻止層
を埋め込む。メルト組成は In:InP :Mn=1 g :5.3mg :0.
2μgで、成長開始温度は約600℃である。
Next, as shown in the same figure (C), the 5i02 film 12
Leave the mask as is and apply the liquid layer growth melt described above (
A second liquid layer epitaxial growth is performed using Mn-doped InP) to selectively embed a current blocking layer consisting of a p--4nP layer 11. The melt composition is In:InP:Mn=1 g:5.3mg:0.
At 2 μg, the growth initiation temperature is about 600°C.

次いで、5i02膜12マスクを除去した後、5i02
膜8を被着し、その面に窓あけしてAu/Pt/Tiか
らなる十電極9を形成し、裏面にAu −Snからなる
一電極10を形成して、第1図のように完成する。
Next, after removing the 5i02 film 12 mask, the 5i02
A film 8 is deposited, a window is opened on its surface to form ten electrodes 9 made of Au/Pt/Ti, and one electrode 10 made of Au-Sn is formed on the back side, completing the process as shown in Fig. 1. do.

次に、第4図は本発明にかかる他の実施例の概要断面図
を示している。第1図の埋め込み型半導体レーザがBH
型(Buried Heterostructure型
)と呼ばれるのに対して、この型はPBH型(Plan
−er Buried Heterostructur
e型)と呼ばれている構造である。
Next, FIG. 4 shows a schematic sectional view of another embodiment according to the present invention. The embedded semiconductor laser in Figure 1 is a BH
This type is called the PBH type (Planned Heterostructure type).
-er Buried Heterostructure
This structure is called e-type).

この構造は、その形成工程においてメサエッチング(第
3図(b)参照)した後、5i02膜マスク12とp 
−1nGaAs Pキャップ層5とを除去し、表面が平
坦化するまで第2回目の液層エピタキシャル成長して、
電流阻止層を埋め込みする。その後、CdまたはZnO
熱拡散、あるいはBe、 Mgなどのイオン注入によっ
て、表面の電極近傍にp+領域13を形成する。そうす
ると、表面が平坦化するため、電極形成が容易であると
云う特徴を持った構造であるが、本構造も第1図に示す
BH型と同様に電流阻止層を高抵抗なp−−InP層で
形成し、同様にリーク径路をなくして高い発光効率を得
るものである。
This structure is formed by mesa etching (see FIG. 3(b)) in the formation process, and then the 5i02 film mask 12 and p
-1nGaAsP cap layer 5 is removed, and a second liquid layer epitaxial growth is performed until the surface is flattened.
Embed a current blocking layer. Then Cd or ZnO
A p+ region 13 is formed on the surface near the electrode by thermal diffusion or ion implantation of Be, Mg, or the like. This structure has the characteristic that electrode formation is easy because the surface is flattened, but this structure also has a current blocking layer made of high-resistance p--InP, similar to the BH type shown in Figure 1. It is formed of layers and similarly eliminates leakage paths to obtain high luminous efficiency.

[発明の効果] 以上の説明から明らかなように、本発明によれば、電流
阻止層からのリーク径路がなくなって、高い発光効率が
得られ、半導体レーザが高性能化される利点がある。
[Effects of the Invention] As is clear from the above description, according to the present invention, there is an advantage that the leak path from the current blocking layer is eliminated, high luminous efficiency is obtained, and the performance of the semiconductor laser is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にがかる一実施例の半導体レーザ装置の
概要断面図、 第2図はその要点を説明するためのInPに対するMn
の添加特性を示す図、 第3図(a)〜(C1は第1図に示す半導体レーザ装置
の形成工程順断面図、 第4図は本発明にかかる他の半導体レーザ装置の概要断
面図、 第5図は従来の半導体レーザ装置の概要断面図である。 図において、 1はn” −InP基板、 2はn−InPバッファ層、 3はn −InGaAs’P活性層、 4はp−InPクラッド層、 5はp −1nGaAs Pキヤツプ層、6はp −I
nP電流阻止層、 7はn −InP電流阻止層、 8は5i02膜、 9は十電極、      10は一電極、11はp−−
InP電流阻止層、 12は5i02膜ストライプマスク、 13はp+領領 域示している。 第1図。 ゝ10 第2図 M?ldl虚紹sf1残′に(厚)数%ノ第3図 第3図 第4図 第5図
FIG. 1 is a schematic sectional view of a semiconductor laser device according to an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view of a semiconductor laser device according to an embodiment of the present invention.
Figures 3(a) to (C1 are cross-sectional views in the order of the formation steps of the semiconductor laser device shown in Figure 1; Figure 4 is a schematic cross-sectional view of another semiconductor laser device according to the present invention; FIG. 5 is a schematic cross-sectional view of a conventional semiconductor laser device. In the figure, 1 is an n''-InP substrate, 2 is an n-InP buffer layer, 3 is an n-InGaAs'P active layer, and 4 is a p-InP layer. cladding layer, 5 is p-1nGaAs P cap layer, 6 is p-I
nP current blocking layer, 7 is n-InP current blocking layer, 8 is 5i02 film, 9 is ten electrodes, 10 is one electrode, 11 is p--
An InP current blocking layer, 12 a 5i02 film stripe mask, and 13 a p+ region. Figure 1.ゝ10 Figure 2 M? Figure 3 Figure 3 Figure 4 Figure 5

Claims (2)

【特許請求の範囲】[Claims] (1)部分的に設けられた活性層の左右両側に、Mn(
マンガン)を添加して補償をおこなつた電流阻止層を設
けた埋め込み型ヘテロ接合構造を有することを特徴とす
る半導体発光装置。
(1) Mn (
1. A semiconductor light-emitting device characterized by having a buried heterojunction structure provided with a current blocking layer which is compensated by adding manganese.
(2)n−InGaAsPからなる活性層の左右両側に
、Mn(マンガン)を添加して補償をおこなつたInP
電流阻止層を設けた埋め込み型ヘテロ接合構造を有する
ことを特徴とする特許請求の範囲第1項記載の半導体発
光装置。
(2) InP with compensation performed by adding Mn (manganese) to both the left and right sides of the active layer made of n-InGaAsP
2. The semiconductor light emitting device according to claim 1, having a buried heterojunction structure provided with a current blocking layer.
JP59262332A 1984-12-11 1984-12-11 Semiconductor light-emitting device Pending JPS61139082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59262332A JPS61139082A (en) 1984-12-11 1984-12-11 Semiconductor light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59262332A JPS61139082A (en) 1984-12-11 1984-12-11 Semiconductor light-emitting device

Publications (1)

Publication Number Publication Date
JPS61139082A true JPS61139082A (en) 1986-06-26

Family

ID=17374294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59262332A Pending JPS61139082A (en) 1984-12-11 1984-12-11 Semiconductor light-emitting device

Country Status (1)

Country Link
JP (1) JPS61139082A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124592A (en) * 1986-11-14 1988-05-28 Nec Corp Semiconductor laser device
JPS63224282A (en) * 1987-03-12 1988-09-19 Fujitsu Ltd Semiconductor light emitting element
JPH0220085A (en) * 1988-07-08 1990-01-23 Nec Corp Semiconductor laser device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124592A (en) * 1986-11-14 1988-05-28 Nec Corp Semiconductor laser device
JPH0587157B2 (en) * 1986-11-14 1993-12-15 Nippon Electric Co
JPS63224282A (en) * 1987-03-12 1988-09-19 Fujitsu Ltd Semiconductor light emitting element
JP2663118B2 (en) * 1987-03-12 1997-10-15 富士通株式会社 Semiconductor light emitting device
JPH0220085A (en) * 1988-07-08 1990-01-23 Nec Corp Semiconductor laser device

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