JPS61138070U - - Google Patents

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Publication number
JPS61138070U
JPS61138070U JP1880885U JP1880885U JPS61138070U JP S61138070 U JPS61138070 U JP S61138070U JP 1880885 U JP1880885 U JP 1880885U JP 1880885 U JP1880885 U JP 1880885U JP S61138070 U JPS61138070 U JP S61138070U
Authority
JP
Japan
Prior art keywords
holding body
processing device
electronic processing
electronic
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1880885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1880885U priority Critical patent/JPS61138070U/ja
Publication of JPS61138070U publication Critical patent/JPS61138070U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を適用したコンピ
ユータシステムを示す外観斜視図である。第2図
は第1図に示すアダプタ3の外観斜視図である。
第3図aおよびbはICカード6の表面および裏
面を示す図である。第4図はICカード6に形成
された凹部形状を説明するための図解図である。
第5図はアダプタ3の断面形状を示す図であり、
特に、第5図aは開成された状態を示し第5図b
は閉成された状態を示す。第6図はこの考案の特
徴となる識別動作を説明するための拡大図であり
、第6図aは係合前の状態を示し、第6図bは係
合後の状態を示す、第7図は第1図〜第6図に示
すコンピユータシステムの電気回路部分を示すブ
ロツク図である。第8図はこの考案の他の実施例
を示す図である。 図において、1は本体、3はアダプタ、5は表
面装置、6はICカード、7はROM、8はゴム
コネクタ、11および12は凸部、13は内部基
板、14は接続電極、15はインタフエイス、1
6はCPU、17はRAM、18はビデオコント
ローラ、20は投光素子、21は受光素子を示す
FIG. 1 is an external perspective view showing a computer system to which an embodiment of this invention is applied. FIG. 2 is an external perspective view of the adapter 3 shown in FIG. 1.
FIGS. 3a and 3b are diagrams showing the front and back sides of the IC card 6. FIG. FIG. 4 is an illustrative view for explaining the shape of the recess formed in the IC card 6. FIG.
FIG. 5 is a diagram showing the cross-sectional shape of the adapter 3,
In particular, Figure 5a shows the opened state and Figure 5b
indicates a closed state. FIG. 6 is an enlarged view for explaining the identification operation which is a feature of this invention, FIG. 6a shows the state before engagement, FIG. 6b shows the state after engagement, and FIG. This figure is a block diagram showing the electric circuit portion of the computer system shown in FIGS. 1 to 6. FIG. 8 is a diagram showing another embodiment of this invention. In the figure, 1 is the main body, 3 is an adapter, 5 is a surface device, 6 is an IC card, 7 is a ROM, 8 is a rubber connector, 11 and 12 are convex parts, 13 is an internal board, 14 is a connection electrode, and 15 is an interface. Face, 1
6 is a CPU, 17 is a RAM, 18 is a video controller, 20 is a light emitting element, and 21 is a light receiving element.

Claims (1)

【実用新案登録請求の範囲】 (1) 所定の集積回路と結合することによつて所
望の動作を行なう電子回路を有する電子処理装置
であつて、 前記集積回路を保持し、識別可能な特有の外形
が与えられている保持体、 前記保持体を受入れて前記集積回路と前記電子
回路を接続するための受入具、および、 前記受入具に設けられ、前記保持体が前記特有
の外形を有しているか否かを識別する識別手段を
備え、 前記識別手段によつて前記保持体が切記特有の
外形を有していると識別されたことに応じて、前
記電子回路の動作が可能となるように構成されて
いる電子処理装置。 (2) 前記識別手段によつて前記保持体が前記特
有の外形を有していると識別されたことに応じて
、前記集積回路と前記電子回路の結合を許すよう
に構成された、実用新案登録請求の範囲第1項記
載の電子処理装置。 (3) 前記識別手段によつて前記保持体が前記特
有の外形を有していると識別されたことに応じて
、前記電子回路の電源をオフするように構成され
た、実用新案登録請求の範囲第1項記載の電子処
理装置。 (4) 前記受入具は前記電子回路に固定的に設け
られている、実用新案登録請求の範囲第1項記な
いし第3項のいずれかに記載の電子処理回路。 (5) 前記受入具は前記電子回路に着脱自在に設
けられており、前記電子回路に装着されたときに
前記集積回路と前記電子回路を接続するための接
続コネクタを含む、実用新案登録請求の範囲第1
項ないし第3項のいずれかに記載の電子処理装置
。 (6) 前記保持体は前記集積回路が取付けられた
ICカードである、実用新案登録請求の範囲第1
項ないし第5項のいずれかに記載の電子処理装置
。 (7) 前記保持体は前記集積回路が収納されたカ
セツトケースである、実用新案登録請求の範囲第
1項ないし第4項のいずれかに記載の電子処理装
置。 (8) 前記識別手段は前記保持体の特有の外形と
係合するように形成された係合手段を含み、前記
受入具に前記保持体が装着されたときに前記係合
手段と前記保持体の外形とが合致するか否かによ
つて前記識別を行なうことを特徴とする、実用新
案登録請求の範囲第1項ないし第7項のいずれか
に記載の電子処理装置。 (9) 前記保持体の特有の外形は該保持体の所定
の位置に形成された凹部であり、 前記係合手段は前記凹部と合致する形状の凸部
である、実用新案登録請求の範囲第8項記載の電
子処理装置。 (10) 前記保持体は表面と裏面とを有し、前記凹
部は前記保持体の表面と裏面の両方に形成される
、実用新案登録請求の範囲第9項記載の電子処理
装置。 〓(11)11〓 前記保持体の表面に形成される凹
部と裏面に形成される凹部は互いに位置がずらさ
れて形成されており、かつ保持体の中央部でオー
バーラツプするように形成されている、実用新案
登録請求の範囲第10項記載の電子処理装置。 〓(12)12〓 前記識別手段は前記保持体が前記
受入具に装着されたとき、該保持体の一方面側に
配置される投光素子と、他方面側に配置される受
光素子とをさらに含み、 前記受光素子は前記投光素子からの光を検知し
たことに応答して、前記電子回路を不能動化する
ための不能動化信号を導出することを特徴とする
、実用新案登録請求の範囲第9項ないし第11項
のいずれかに記載の電子処理装置。 (13) 前記電子回路はコンピユータ装置であり、 前記集積回路は前記コンピユータ装置のプログ
ララを記憶したメモリ装置である、実用新案登録
請求の範囲第1項ないし第12項のいずれかに記
載の電子処理装置。
[Claims for Utility Model Registration] (1) An electronic processing device having an electronic circuit that performs a desired operation when combined with a predetermined integrated circuit, which holds the integrated circuit and has an identifiable unique a holder having a given outer shape; a receiving tool for receiving the holder and connecting the integrated circuit and the electronic circuit; and a receiving tool provided on the receiving tool, the holder having the specific outer shape. and an identification means for identifying whether or not the holding body has a cutout-specific external shape, and the electronic circuit is enabled to operate in response to the identification means identifying the holding body as having an external shape unique to the cutout. Electronic processing equipment configured in (2) A utility model configured to permit coupling of the integrated circuit and the electronic circuit in response to the identification means identifying the holding body as having the unique external shape. An electronic processing device according to claim 1. (3) The claim for utility model registration is configured to turn off the power to the electronic circuit in response to the identification means identifying the holding body as having the unique external shape. The electronic processing device according to scope 1. (4) The electronic processing circuit according to any one of claims 1 to 3, wherein the receiving tool is fixedly provided to the electronic circuit. (5) The receiving device is detachably attached to the electronic circuit, and includes a connector for connecting the integrated circuit and the electronic circuit when attached to the electronic circuit. Range 1
The electronic processing device according to any one of Items 1 to 3. (6) Utility model registration claim 1, wherein the holder is an IC card to which the integrated circuit is attached.
The electronic processing device according to any one of Items 1 to 5. (7) The electronic processing device according to any one of claims 1 to 4, wherein the holder is a cassette case in which the integrated circuit is housed. (8) The identification means includes an engaging means formed to engage with the unique external shape of the holding body, and when the holding body is attached to the receiving tool, the engaging means and the holding body are connected to each other. 8. The electronic processing device according to claim 1, wherein the identification is performed based on whether or not the outer shape of the electronic processing device matches the outer shape of the electronic processing device. (9) The specific external shape of the holding body is a recess formed at a predetermined position of the holding body, and the engaging means is a convex portion having a shape that matches the recess. The electronic processing device according to item 8. (10) The electronic processing device according to claim 9, wherein the holder has a front surface and a back surface, and the recess is formed on both the front and back surfaces of the holder. (11) 11 The recesses formed on the front surface and the recesses formed on the back surface of the holding body are formed so as to be shifted from each other, and are formed so as to overlap at the center of the holding body. , an electronic processing device according to claim 10 of the utility model registration claim. 〓(12)12〓 When the holding body is attached to the receiving tool, the identification means distinguishes between a light emitting element disposed on one side of the holding body and a light receiving element disposed on the other side of the holding body. A claim for registration of a utility model, further comprising: the light receiving element derives a disabling signal for disabling the electronic circuit in response to detecting light from the light projecting element. The electronic processing device according to any one of items 9 to 11. (13) The electronic processing according to any one of claims 1 to 12, wherein the electronic circuit is a computer device, and the integrated circuit is a memory device that stores a programmer for the computer device. Device.
JP1880885U 1985-02-12 1985-02-12 Pending JPS61138070U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1880885U JPS61138070U (en) 1985-02-12 1985-02-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1880885U JPS61138070U (en) 1985-02-12 1985-02-12

Publications (1)

Publication Number Publication Date
JPS61138070U true JPS61138070U (en) 1986-08-27

Family

ID=30507790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1880885U Pending JPS61138070U (en) 1985-02-12 1985-02-12

Country Status (1)

Country Link
JP (1) JPS61138070U (en)

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