JPS58183537U - programmable equipment - Google Patents
programmable equipmentInfo
- Publication number
- JPS58183537U JPS58183537U JP7867082U JP7867082U JPS58183537U JP S58183537 U JPS58183537 U JP S58183537U JP 7867082 U JP7867082 U JP 7867082U JP 7867082 U JP7867082 U JP 7867082U JP S58183537 U JPS58183537 U JP S58183537U
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- male
- microswitch
- programmable device
- operate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stored Programmes (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例の外観図、第2図は第1図実
施例のブロック線図、第3図は第1図実施例の要部構成
説明図、第4図、第5図は第1図、の動作説明図、第6
図は第3図の動作説明図である。
10・・・機器本体、11・・・マイクロプロセッサ(
CPU)、12・・・システムROM、l 3・・・I
10インタフェイス、14・・・ユーザーROM、 l
6・・−RAM。
20・・・データバス、30・・・プログラマ、31・
・・プログラムROM、37・・・RAM、3B・・・
演算ROM。
50・・・コネクター、51・・・雄コネクタ−,52
・・・マイクロスイッチ、53・・・雌コネクタ−,5
4・・・アクチュエータ。FIG. 1 is an external view of an embodiment of the present invention, FIG. 2 is a block diagram of the embodiment in FIG. 1, FIG. 3 is an explanatory diagram of the main part configuration of the embodiment in FIG. The diagrams are Fig. 1, an explanatory diagram of the operation, and Fig. 6.
The figure is an explanatory diagram of the operation of FIG. 3. 10...Device body, 11...Microprocessor (
CPU), 12... System ROM, l 3... I
10 interface, 14...user ROM, l
6...-RAM. 20...Data bus, 30...Programmer, 31.
...Program ROM, 37...RAM, 3B...
Arithmetic ROM. 50... Connector, 51... Male connector, 52
...Micro switch, 53...Female connector, 5
4...actuator.
Claims (1)
ラマを用いてユーザープログラムを書込んだユーザーズ
ROMをCPUが内蔵された機器本体に実装する方式の
プログラマブル機器において、前記雄雌コネクターの一
方に設けられたマイクロスイッチと、他方のコネクター
に設けられ該マイクロスイッチを動作させる凸状のアク
チュエーターとを具備し、前記雄雌コネクターの着脱の
際に、前記マイクロスイッチが前記雄雌コネクターの電
気的接続前に動作して前記CPUをホールド状態にしか
つ電気的接続後に前記CPUのホールド状態を解除する
ように前記マイクロスイッチと前記アクチュエーターと
が配置されたことを特徴とするプログラマブル機器。In a programmable device in which a user's ROM in which a user program is written using a programmer connected to a data bus through a male and female connector is mounted in a device body with a built-in CPU, a programmable device is provided on one of the male and female connectors. and a convex actuator provided on the other connector to operate the microswitch, and when the male and female connectors are connected or disconnected, the microswitch A programmable device, characterized in that the microswitch and the actuator are arranged so as to operate to put the CPU in a hold state and release the CPU from the hold state after electrical connection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7867082U JPS58183537U (en) | 1982-05-28 | 1982-05-28 | programmable equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7867082U JPS58183537U (en) | 1982-05-28 | 1982-05-28 | programmable equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58183537U true JPS58183537U (en) | 1983-12-07 |
Family
ID=30087876
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7867082U Pending JPS58183537U (en) | 1982-05-28 | 1982-05-28 | programmable equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58183537U (en) |
-
1982
- 1982-05-28 JP JP7867082U patent/JPS58183537U/en active Pending
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