JPS63107071U - - Google Patents
Info
- Publication number
- JPS63107071U JPS63107071U JP19967486U JP19967486U JPS63107071U JP S63107071 U JPS63107071 U JP S63107071U JP 19967486 U JP19967486 U JP 19967486U JP 19967486 U JP19967486 U JP 19967486U JP S63107071 U JPS63107071 U JP S63107071U
- Authority
- JP
- Japan
- Prior art keywords
- card
- shaped memory
- voltage detection
- detection circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims description 3
- 238000003780 insertion Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Description
第1図はこの考案の一実施例によるカード状メ
モリの挿入装置を示す回路構成のブロツク図、第
2図はその動作を説明するためフローチヤート図
、第3図はカード状メモリの一部を切欠いた平面
図、第4図はカード状メモリのコネクタの斜視図
、第5図はその側面図である。
1はマイクロコンピユータシステム本体、2は
カード状メモリ、3はCPU、4は電源切替回路
、9は電圧検出回路、10はプルアツプ抵抗、1
1はラツチ回路。
Fig. 1 is a block diagram of the circuit configuration of a card-shaped memory insertion device according to an embodiment of this invention, Fig. 2 is a flowchart for explaining its operation, and Fig. 3 shows a part of the card-shaped memory. FIG. 4 is a cutaway plan view, FIG. 4 is a perspective view of the connector of the card-like memory, and FIG. 5 is a side view thereof. 1 is a microcomputer system body, 2 is a card-like memory, 3 is a CPU, 4 is a power supply switching circuit, 9 is a voltage detection circuit, 10 is a pull-up resistor, 1
1 is a latch circuit.
Claims (1)
ド状メモリを挿脱するカード状メモリの挿入装置
において、前記カード状メモリの入力端子間に接
続したプルアツプ抵抗の電圧を検出する電圧検出
回路と、前記電圧検出回路の出力状態を保持する
ラツチ回路と、前記ラツチ回路で保持された前記
電圧検出回路の出力に基づいて前記カード状メモ
リが前記マイクロコンピユータシステム本体に挿
入されたことを判断するCPUと、前記CPUか
らの判断信号に基づいて前記カード状メモリに対
する電源を切替える電源切替回路とを具備したこ
とを特徴とするカード状メモリの挿入装置。 A card-shaped memory insertion device for inserting and removing a card-shaped memory into and from a microcomputer system main body includes a voltage detection circuit for detecting a voltage of a pull-up resistor connected between input terminals of the card-shaped memory, and an output of the voltage detection circuit. a latch circuit that holds the state; a CPU that determines that the card-shaped memory is inserted into the microcomputer system main body based on the output of the voltage detection circuit that is held by the latch circuit; and a determination from the CPU. A card-shaped memory insertion device comprising: a power supply switching circuit that switches the power supply to the card-shaped memory based on a signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19967486U JPS63107071U (en) | 1986-12-29 | 1986-12-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19967486U JPS63107071U (en) | 1986-12-29 | 1986-12-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63107071U true JPS63107071U (en) | 1988-07-11 |
Family
ID=31161517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19967486U Pending JPS63107071U (en) | 1986-12-29 | 1986-12-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63107071U (en) |
-
1986
- 1986-12-29 JP JP19967486U patent/JPS63107071U/ja active Pending
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