JPS61137373A - Manufacture of semiconductor radiation detector - Google Patents

Manufacture of semiconductor radiation detector

Info

Publication number
JPS61137373A
JPS61137373A JP59260157A JP26015784A JPS61137373A JP S61137373 A JPS61137373 A JP S61137373A JP 59260157 A JP59260157 A JP 59260157A JP 26015784 A JP26015784 A JP 26015784A JP S61137373 A JPS61137373 A JP S61137373A
Authority
JP
Japan
Prior art keywords
layer
substrate
single crystal
electrode
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59260157A
Other languages
Japanese (ja)
Other versions
JPH0543196B2 (en
Inventor
Yasukazu Seki
康和 関
Noritada Sato
則忠 佐藤
Masaya Yabe
正也 矢部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP59260157A priority Critical patent/JPS61137373A/en
Publication of JPS61137373A publication Critical patent/JPS61137373A/en
Publication of JPH0543196B2 publication Critical patent/JPH0543196B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/115Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
    • H01L31/118Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation of the surface barrier or shallow PN junction detector type, e.g. surface barrier alpha-particle detectors

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Measurement Of Radiation (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To obtain a detector of low Schottky barrier by coating a reverse conductive type amorphous Si layer from the surface to the side of one conductive type high impurity Si single crystal substrate, forming one metal electrode on the surface, and diffusing one conductive type high impurity density layer in the surface layer of the back surface of the substrate having no amorphous Si layer, and forming other electrode thereat. CONSTITUTION:An N type amorphous Si layer 2 is coated from one surface to the side of a P type high purity Si single crystal substrate 1 having 10kOMEGAcm or higher of specific resistance, and one aluminum electrode 3 is formed on the surface portion. Then, an aluminum film 6 is coated on the back surface of the substrate having no layer 2, heat treated in Ar plasma, aluminum in the film 6 is diffused to form a P<+> type layer 61 in the surface layer of the back surface of the substrate 1, and other aluminum electrode 4 is coated thereon. Thus, the height of a Schottky barrier produced in a boundary between the substrate 1 and the electrode 4 is reduced to improve the detecting efficiency of the detector.

Description

【発明の詳細な説明】[Detailed description of the invention] 【発明の属する技術分野] 本発明は、高純度の単結晶半導体基板とその上の非晶質半導体層との間に形成されるヘテロ接合を利用した半導体放射線検出器の製造方法に関する。 【従来技術とその問題点】[Technical field to which the invention pertains] The present invention relates to a method for manufacturing a semiconductor radiation detector using a heterojunction formed between a high-purity single crystal semiconductor substrate and an amorphous semiconductor layer thereon. [Prior art and its problems]

半導体内の空乏層への放射線の入射により生ずるキャリ
アによって放射線を検出する検出器の空乏層形成の手段
として、例えば高純度単結晶シリコン基板とその上に被
着された非晶質シリコン膜との間に形成されるヘテロ接
合を利用した半導体放射線検出器は、既に特願昭sa:
xoz3st号および特願昭58−156031号によ
り出願されている。この検出器は、第2図の断面構造に
示すように単結晶シリコン基[1の一表面および側面に
非晶質シリコン層2が被着されており、両面に設けた金
属電極3および4の間に電圧を印加して半導体単結晶l
中に空乏層5を広げ、この空乏層中へ放射線を入射させ
電子−正孔対を生じさせて信号を検出するものであワた
。しかしこのような検出器においては、特にシリコン単
結晶1および非晶質シリコン層2が高圧抵抗の場合には
、金属電極3.4と単結晶シリコンおよび非晶質シリコ
ンとの界面に生ずるシッフ)キー障壁での電圧降下が大
きく生ずるため本来の非晶質シリコンと単結晶シリコン
のへテロ接合への印加電圧が十分に印加されず、その結
果十分に結晶シリコン中に空乏層が広がらないという欠
点を有していた。また、そのショットキー障壁部分が、
半導体放射線検出器として信号を取り出す際にノイズの
発生源となるため好ましいものではないという欠点も併
有していた。 第3図は第2図に示した半導体放射線検出器におけるエ
ネルギ分布を示し、下方に第2図に記入された符号によ
って各部の位置を示す、またE。 はフェルミレベルエネルギ、C,B、はコンダクション
バンド、V、B、はバレンスパントをそれぞれ示す、第
3図において金属電極4と単結晶シリコン1との接合部
21および非晶質シリコン2と金属1tFi3との接合
部23にショットキー障壁が生じており、単結晶シリコ
ンlと非晶質シリコン2との界面にヘテロ接合22が存
在する。ショットキー障壁は半導体と金属との仕事関数
のエネルギ差に原因するものでこのエネルギ差を小さく
することでショットキー障壁を小さくすることが出来る
ことは公知の技術である。またこのショットキー障壁を
小さくするために、すなわちオーミック・コンタクトを
形成するために、p型半導体基体ではp°層を形成しそ
の上に金属電極を形成する方法、またはn型半導体基体
ではn゛層を形成してその上に金属電極を形成する方法
が現在の半導体プロセスで広く用いられている技術であ
る。しかし、現在用いられているp゛層、10層形成技
術はすなわち、オーミック・コンタクト形成技術は10
00℃以上の熱拡散法や800℃以上の後処理を必要と
するイオン打込法などである。これ等の方法はいずれも
800℃以上の高温プロセスを含んでいることから、従
来の低抵抗シリコンではほとんど問題にならないが、高
純度シリコン基体を用いる半導体放射線検出器では適す
るプロセスではない。 その理由は、高純度シリコン基体を高温に晒すことによ
り、シリコン基体自身に熱的欠陥を与え、その結果ラフ
タイムを減少させ素子の電気的特性を奢しく劣化させて
しまう欠点があるからである。
As a means of forming a depletion layer in a detector that detects radiation by carriers generated by the incidence of radiation into a depletion layer in a semiconductor, for example, a high-purity single crystal silicon substrate and an amorphous silicon film deposited thereon are used. A semiconductor radiation detector using a heterojunction formed between
It has been filed under No. xoz3st and Japanese Patent Application No. 156031/1983. As shown in the cross-sectional structure of FIG. 2, this detector has an amorphous silicon layer 2 deposited on one surface and side surfaces of a single-crystal silicon base [1], and metal electrodes 3 and 4 provided on both sides. Semiconductor single crystal l by applying a voltage between
A depletion layer 5 is spread inside the depletion layer, and radiation is incident into the depletion layer to generate electron-hole pairs to detect a signal. However, in such a detector, especially when the silicon single crystal 1 and the amorphous silicon layer 2 have high voltage resistance, Schiff (Schiff) that occurs at the interface between the metal electrode 3.4 and the single crystal silicon and the amorphous silicon Due to the large voltage drop at the key barrier, the voltage applied to the original heterojunction of amorphous silicon and single crystal silicon is not sufficiently applied, and as a result, the depletion layer does not spread sufficiently into the crystalline silicon. It had In addition, the Schottky barrier part is
It also has the disadvantage that it is not desirable as a semiconductor radiation detector because it becomes a source of noise when extracting signals. FIG. 3 shows the energy distribution in the semiconductor radiation detector shown in FIG. 2, and the positions of various parts are indicated by the symbols written in FIG. 2 below. is the Fermi level energy, C and B are the conduction band, and V and B are the valence span, respectively. In FIG. A Schottky barrier occurs at the junction 23 with 1tFi3, and a heterojunction 22 exists at the interface between single crystal silicon 1 and amorphous silicon 2. The Schottky barrier is caused by the energy difference between the work functions of a semiconductor and a metal, and it is a well-known technique that the Schottky barrier can be reduced by reducing this energy difference. In order to reduce this Schottky barrier, that is, to form an ohmic contact, there is a method of forming a p° layer on a p-type semiconductor substrate and forming a metal electrode thereon, or a method of forming an n° layer on an n-type semiconductor substrate. A method of forming a layer and forming a metal electrode thereon is a technique widely used in current semiconductor processing. However, the currently used p layer and 10 layer formation technology, that is, the ohmic contact formation technology is 10
These methods include a thermal diffusion method at 00° C. or higher and an ion implantation method that requires post-treatment at 800° C. or higher. Since these methods all involve high-temperature processes of 800° C. or higher, they pose little problem with conventional low-resistance silicon, but are not suitable processes for semiconductor radiation detectors using high-purity silicon substrates. The reason for this is that exposing a high-purity silicon substrate to high temperatures causes thermal defects in the silicon substrate itself, resulting in a reduction in rough time and a drastic deterioration of the electrical characteristics of the device.

【発明の目的】[Purpose of the invention]

本発明は、高純度半導体単結晶の一表面に非晶質半導体
層を被着し、半導体単結晶および非晶質半導体層のそれ
ぞれの表面に金属電極を有する既出願の半導体放射線検
出器の電極と半導体との界面にショットキーR壁の生ず
るのを防止し、しかも単結晶半導体基板を高温に晒して
熱的欠陥を生ずることのない製造方法を提供することを
目的とする。
The present invention relates to an electrode of a semiconductor radiation detector that has been previously applied for, in which an amorphous semiconductor layer is deposited on one surface of a high-purity semiconductor single crystal, and metal electrodes are provided on each surface of the semiconductor single crystal and the amorphous semiconductor layer. An object of the present invention is to provide a manufacturing method that prevents the formation of a Schottky R wall at the interface between a single crystal semiconductor substrate and a semiconductor, and that does not cause thermal defects by exposing a single crystal semiconductor substrate to high temperatures.

【発明の要点】[Key points of the invention]

本発明によれば、一導電形の高純度単結晶半導体基板の
少なくとも主表面の一つを覆う逆導電形の非晶質半導体
層を被着したのち、不活性ガスプラズマ中で単結晶半導
体基板の他の主表面あるいは非晶質半導体層の表面から
不純物を侵入させて本来の半導体基板あるいは半導体層
と同一導電形で不純物濃度の高い層を形成し、その層の
上に金属?itiを設けることにより上記の目的が達成
される。 r発明の実施例】 第1図(♂)〜(11)に本発明の一実施例の工程の大
部分を示す、第1図(旬に示す比抵抗1(lkQc*以
上でp型の高純度シリコン単結晶基板lの上表面に公知
のプラズマCVD法によりモノシランガスがら弱い口型
を示すアンドープ非晶質シリコン層2を被着させろ(b
図)0次に非晶質シリコン層2の表面に金属型ff13
としてアルミニウムを蒸着する(0図)、つづいて第1
図1dlに示すように上下を置き換えて上表面に0.(
11−0,1μ−の厚さのアルミニウム膜6を真空蒸着
法で形成する (6図)。 このような工程を経た素子1Gを第4図に示す装置の反
応槽11の中に入れ、アルミニウム膜6を下にして下部
電極板12の上に載置する。第4図の装置はそのほかに
上部電極板13.直流電圧電源14.排気系15.排気
量調整用パルプ16.真空計17.下部電極板加熱用ヒ
ータ1日、ヒータ用電源19を備え、さらに反応槽11
に不活性ガスボンベ31が減圧弁32゜ガス流量調節器
33.ガス流量計34を介して接続されている。第4図
の装置を用いて次の条件でプラズマを発生させ、アルミ
ニウム膜6からアルミニウムをシリコン阜結晶中に侵入
させる。 1ン基1(下sii極Fi)温度 :  300”C2
)真空度 :  0.1〜0.5Torr3)印加電圧
 : 直流400〜1G(IOV4)使用不活性ガス 
: アルゴン 以下アルミニウムの侵入過程について説明する。 まず第1図(@)に示した素子10を!!置する下部電
極室にした後、排気量調整バルブ16とガス流量調整バ
ルブ33を用いて反応[11内のアルゴン圧力を0゜1
〜0.5 Torrに保つ、ここで電極板12.13間
に電a14を用いて400〜1000 Vの直流電圧を
印加する。 これにより反応槽内電極間にグロー放電が生じ、この結
果下部電極板上部には極めて電界の強いクルックス暗部
が存在する。第5図は第4図の素子lO付近の拡大図で
ある。ここで、イオン化したアルゴン35が陰極電極1
2に向かって加速され、アルミニウム6に衝突する作用
によりシリコン単結晶1中へアルミニウムが侵入し、■
族元素であるアルミニウムはアクセプタとして働くため
、p°層61を形成するものと考えられる。またアルミ
ニウム膜6表面に衝突したアルゴンイオン35は、アル
ミニウム膜6からアルミニウムをはねとばす作用も十分
に考えられる。 このようにしてp°層61を形成した後、再度アルミニ
ウムを真空蒸着法により咳p“層表面に被着せしめ電極
4とした。このようにして得られた半導体放射線検出器
は、印加電圧のほとんどが、単結晶シリコンと非晶質シ
リコンのへテロ接合部分に印加しつるため、十分に結晶
シリコン中に空乏層を広げることが可能であるばかりで
なく、従来シッフトキー障壁で発生していたノイズも抑
制し得ることにより、直接金属電極を形成した半導体放
射線検出器と比較してγ線およびβ線検出効率はそれぞ
れ15%、12%の向上が見られた。 別の実施例として、第3図に符号23で示したシッソト
キー障壁、すなわち非晶質シリコンと金属電極の間のシ
ッットキー障壁を減少させたものについて述べる。第6
図tal、(blにおいては第1図と同様の工程で比抵
抗10kQas以上、p型車結晶基板1の上にアンドー
プ非晶質2937層2を被着させた後、第6図(C)に
示すように非晶質シリコン層2の表面にアンチモン1〜
10%を含む金の膜7を真空蒸着する。 次いで上述の実施例と同様に第4図に示す装置を用いて
アルゴンプラズマにより非晶質シリコンM2の中にアン
チモンを含んだ金を侵入させる。 この結果非晶質シリコン表面層はアンチモンの添加によ
りn″層となり、金属−n″層−弱n非晶賀シリコン層
の接合が形成され、シッフトキー障壁が低減される。こ
のあとさらに金−アンチモン膜7の上に金蒸着をして電
極3を形成する。しかし金−アンチモン膜を厚くしてそ
のまま一方の電極として用いてもよい、このようにして
作製した半導体放射線検出器は、非晶質シリコン層の上
に直接アルミニウム電極を設けた検出器と比較してγ線
およびβ線検出効率はそれぞれ5%、7%の向上が見ら
れた。 この実施例では非晶質シリコンM2をアンドープ非晶質
シリコンによって形成しているが、適応した不純物をド
ーピングしてn型を強めた場合、あるいはn型シリコン
単結晶上にp型非晶質シリコン屑を被着した場合にも、
本発明により低温プラズマプロセスによりそれぞれn4
層あるいはp。 を非晶質シリコン表面層に形成することも有効である。
According to the present invention, after depositing an amorphous semiconductor layer of an opposite conductivity type covering at least one main surface of a high-purity single crystal semiconductor substrate of one conductivity type, the single crystal semiconductor substrate is heated in an inert gas plasma. Impurities are introduced from the other main surface of the semiconductor substrate or the surface of the amorphous semiconductor layer to form a layer with the same conductivity type and high impurity concentration as the original semiconductor substrate or semiconductor layer, and then a metal layer is formed on top of that layer. The above objective is achieved by providing iti. Embodiment of the Invention] Figures 1 (♂) to (11) show most of the steps of an embodiment of the present invention. An undoped amorphous silicon layer 2 exhibiting a weak mouth shape due to monosilane gas is deposited on the upper surface of a pure silicon single crystal substrate l by a known plasma CVD method (b
Figure) Metal type ff13 on the surface of the zero-order amorphous silicon layer 2.
(Fig. 0), followed by the first step.
As shown in Figure 1dl, the top and bottom are replaced and 0. (
An aluminum film 6 having a thickness of 11-0.1 .mu.- is formed by vacuum evaporation (Figure 6). The device 1G that has undergone these steps is placed in the reaction tank 11 of the apparatus shown in FIG. 4, and placed on the lower electrode plate 12 with the aluminum film 6 facing down. In addition, the device shown in FIG. 4 has an upper electrode plate 13. DC voltage power supply 14. Exhaust system 15. Pulp for adjusting displacement 16. Vacuum gauge 17. It is equipped with a heater for heating the lower electrode plate, a power source 19 for the heater, and a reaction tank 11.
An inert gas cylinder 31 is connected to a pressure reducing valve 32 and a gas flow rate regulator 33. It is connected via a gas flow meter 34. Using the apparatus shown in FIG. 4, plasma is generated under the following conditions to cause aluminum to penetrate from the aluminum film 6 into the silicon crystal. 1st group 1 (lower sii pole Fi) temperature: 300”C2
) Vacuum degree: 0.1 to 0.5 Torr3) Applied voltage: DC 400 to 1G (IOV4) Inert gas used
: Explain the intrusion process of aluminum below argon. First, the element 10 shown in Figure 1 (@)! ! After the lower electrode chamber is set, the argon pressure in the reaction chamber 11 is reduced to 0°1 using the exhaust volume adjustment valve 16 and the gas flow rate adjustment valve 33.
A DC voltage of 400 to 1000 V is applied between the electrode plates 12 and 13 using an electric conductor A14. This causes a glow discharge between the electrodes in the reaction tank, and as a result, a Crookes dark area with an extremely strong electric field exists above the lower electrode plate. FIG. 5 is an enlarged view of the vicinity of the element 10 in FIG. 4. Here, ionized argon 35 is applied to the cathode electrode 1.
2, aluminum penetrates into silicon single crystal 1 due to the action of colliding with aluminum 6, and
Since aluminum, which is a group element, acts as an acceptor, it is considered that the p° layer 61 is formed. Furthermore, the argon ions 35 colliding with the surface of the aluminum film 6 can be considered to have the effect of repelling aluminum from the aluminum film 6. After forming the p° layer 61 in this manner, aluminum was again deposited on the surface of the p° layer by vacuum evaporation to form the electrode 4. Most of the energy is applied to the heterojunction between single crystal silicon and amorphous silicon, which not only makes it possible to sufficiently expand the depletion layer in the crystal silicon, but also eliminates the noise that conventionally occurs in the shifted key barrier. As a result, the detection efficiency of γ-rays and β-rays was improved by 15% and 12%, respectively, compared to a semiconductor radiation detector in which a metal electrode was directly formed. The Sittky barrier indicated by the reference numeral 23 in the figure, that is, a reduced Sittky barrier between amorphous silicon and a metal electrode will be described.
tal, (in BL, after depositing an undoped amorphous 2937 layer 2 on a p-type wheel crystal substrate 1 with a specific resistance of 10 kQas or more in the same process as in FIG. 1, As shown, antimony 1 to 1 on the surface of the amorphous silicon layer 2
A film 7 of gold containing 10% is vacuum deposited. Next, gold containing antimony is infiltrated into the amorphous silicon M2 by argon plasma using the apparatus shown in FIG. 4 in the same manner as in the above embodiment. As a result, the amorphous silicon surface layer becomes an n'' layer due to the addition of antimony, a metal-n'' layer-weak n amorphous silicon layer junction is formed, and the shift key barrier is reduced. Thereafter, gold is further deposited on the gold-antimony film 7 to form the electrode 3. However, it is also possible to make the gold-antimony film thicker and use it as it is as one electrode.Semiconductor radiation detectors fabricated in this way are compared with detectors in which an aluminum electrode is provided directly on the amorphous silicon layer. The γ-ray and β-ray detection efficiency were improved by 5% and 7%, respectively. In this example, the amorphous silicon M2 is formed of undoped amorphous silicon, but if the n-type is strengthened by doping with an appropriate impurity, or if p-type amorphous silicon is formed on an n-type silicon single crystal. Even if debris is deposited,
According to the present invention, each n4
layer or p. It is also effective to form an amorphous silicon surface layer.

【発明の効果】【Effect of the invention】

本発明は、単結晶半導体と非晶質半導体とのへテロ接合
に基づく空乏層への放射線の入射により生ずる電気信号
を利用した放射線検出器の、単結晶および非晶質半導体
に設ける電極との界面におけろシッットキー障壁を低減
し、オーム接触に近づけるため、単結晶半導体膜あるい
は非晶質半導体層へ低温で生成されるプラズマのエネル
ギで金属を侵入させて高濃度不純物層を形成するもので
ある。この結果高純度の半導体単結晶に対する高温処理
の悪影響を避は短い処理時間、簡便な装置により低い費
用で半導体放射線検出器の検出効率が向上できる。
The present invention provides a radiation detector that utilizes an electrical signal generated by the incidence of radiation into a depletion layer based on a heterojunction between a single crystal semiconductor and an amorphous semiconductor. In order to reduce the Schittky barrier at the interface and bring it closer to ohmic contact, a highly concentrated impurity layer is formed by infiltrating metal into a single crystal semiconductor film or an amorphous semiconductor layer using the energy of plasma generated at low temperatures. be. As a result, the adverse effects of high-temperature processing on high-purity semiconductor single crystals can be avoided, and the detection efficiency of semiconductor radiation detectors can be improved at low cost with short processing times and simple equipment.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の工程を順次示す断面図、第
2図は本発明の対象である半導体放射線検出器の断面図
、第3図はそのエネルギ準位図、第4図は本発明の実施
に用いられるプラズマ発生装置の一例の構成説明図、第
5図は第4図の装置の一部の拡大断面図、第6図は本発
明の別の実施例の工程を順次示す断面図である。 1:p型車結晶シリコン板、2:非晶質シリコン層、3
.4:金属電極、6:アルミニウム膜、61:p”層、
7:金−アンチモン膜、10:素子、11:反応槽、1
2,13 : を極板、15:排気系、31;不活性ガ
スボンベ。 才1区 才2図 才3図 +4図
Fig. 1 is a sectional view sequentially showing the steps of an embodiment of the present invention, Fig. 2 is a sectional view of a semiconductor radiation detector which is the object of the present invention, Fig. 3 is its energy level diagram, and Fig. 4 is a sectional view showing the steps of an embodiment of the present invention. A configuration explanatory diagram of an example of a plasma generating device used for carrying out the present invention, FIG. 5 is an enlarged cross-sectional view of a part of the device shown in FIG. 4, and FIG. 6 sequentially shows the steps of another embodiment of the present invention. FIG. 1: P-type wheel crystal silicon plate, 2: Amorphous silicon layer, 3
.. 4: metal electrode, 6: aluminum film, 61: p'' layer,
7: gold-antimony film, 10: element, 11: reaction tank, 1
2, 13: electrode plate, 15: exhaust system, 31: inert gas cylinder. Sai 1 Ward Sai 2 Diagram Sai 3 Diagram + 4 Diagram

Claims (1)

【特許請求の範囲】[Claims] 1)一導電形の高純度単結晶半導体基板の少なくとも主
表面の一つを覆う逆導電形の非晶質半導体層を被着した
のち、不活性ガスプラズマ中で単結晶半導体基板の他の
主表面あるいは非晶質半導体層の表面から不純物を侵入
させて本来の半導体基板あるいは半導体層と同一導電形
で不純物濃度の高い表面層を形成し、該層の上に金属電
極を設けることを特徴とする半導体放射線検出器の製造
方法。
1) After depositing an amorphous semiconductor layer of the opposite conductivity type covering at least one main surface of a high purity single crystal semiconductor substrate of one conductivity type, the other main surface of the single crystal semiconductor substrate is deposited in an inert gas plasma. It is characterized by infiltrating impurities from the surface or the surface of an amorphous semiconductor layer to form a surface layer having the same conductivity type as the original semiconductor substrate or semiconductor layer and having a high impurity concentration, and providing a metal electrode on the layer. A method for manufacturing a semiconductor radiation detector.
JP59260157A 1984-12-10 1984-12-10 Manufacture of semiconductor radiation detector Granted JPS61137373A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59260157A JPS61137373A (en) 1984-12-10 1984-12-10 Manufacture of semiconductor radiation detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59260157A JPS61137373A (en) 1984-12-10 1984-12-10 Manufacture of semiconductor radiation detector

Publications (2)

Publication Number Publication Date
JPS61137373A true JPS61137373A (en) 1986-06-25
JPH0543196B2 JPH0543196B2 (en) 1993-06-30

Family

ID=17344105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59260157A Granted JPS61137373A (en) 1984-12-10 1984-12-10 Manufacture of semiconductor radiation detector

Country Status (1)

Country Link
JP (1) JPS61137373A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100435295B1 (en) * 2001-04-12 2004-06-10 가부시키가이샤 시마쓰세사쿠쇼 Radiation detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100435295B1 (en) * 2001-04-12 2004-06-10 가부시키가이샤 시마쓰세사쿠쇼 Radiation detector

Also Published As

Publication number Publication date
JPH0543196B2 (en) 1993-06-30

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