JPS61133863U - - Google Patents
Info
- Publication number
- JPS61133863U JPS61133863U JP1803985U JP1803985U JPS61133863U JP S61133863 U JPS61133863 U JP S61133863U JP 1803985 U JP1803985 U JP 1803985U JP 1803985 U JP1803985 U JP 1803985U JP S61133863 U JPS61133863 U JP S61133863U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- serial
- parallel
- unit
- image
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Image Input (AREA)
Description
第1図は本考案一実施例のブロツク図、第2図
は第1図に示すリード・ライトタイミング発生部
内のAND回路の入出力信号を示すブロツク図、
第3図は第1図に示す実施例の動作時の各信号の
タイミング図、第4図は従来の図面の読取装置の
一例のブロツク図である。
1……読取部、2……シリアル・パラレル変換
部、3……画像メモリ、4……パラレル・シリア
ル変換部、5……テレビ制御部、6……画像表示
部、7……リード・ライトタイミング発生部、8
……AND回路、T1……水平走査帰線時間、T
2……書込み完了時間。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram showing input and output signals of an AND circuit in the read/write timing generator shown in FIG. 1.
FIG. 3 is a timing diagram of each signal during operation of the embodiment shown in FIG. 1, and FIG. 4 is a block diagram of an example of a conventional drawing reading device. DESCRIPTION OF SYMBOLS 1... Reading section, 2... Serial/parallel conversion section, 3... Image memory, 4... Parallel/serial conversion section, 5... Television control section, 6... Image display section, 7... Read/write Timing generator, 8
...AND circuit, T1...Horizontal scanning retrace time, T
2...Writing completion time.
Claims (1)
パラレル信号に変換するシリアル・パラレル変換
部と、変換されたパラレル信号を記憶する画像メ
モリと、該画像メモリからパラレル信号を読出し
てシリアル信号に変換するパラレル・シリアル変
換部と、変換されたシリアル信号を画像へ表示す
るために制御するテレビ制御部と、該テレビ制御
部の制御により前記シリアル信号を画像に表示す
る画像表示部と、前記シリアル・パラレル変換部
とテレビ制御部からの制御信号を入力し前記画像
メモリにリアルタイムに読み書き動作させるため
のタイミング信号を送出するリード・ライト・タ
イミング発生部とを含むことを特徴とする図面の
読取装置。 a reading unit, a serial/parallel conversion unit that converts the serial signal read by the reading unit into a parallel signal, an image memory that stores the converted parallel signal, and reads the parallel signal from the image memory and converts it into a serial signal. a parallel-to-serial converter for displaying the serial signal; a television control unit for controlling the converted serial signal to be displayed on an image; an image display unit for displaying the serial signal on an image under the control of the television control unit; A drawing reading device comprising: a parallel conversion section; and a read/write timing generation section that inputs a control signal from a television control section and sends a timing signal for reading and writing to the image memory in real time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1803985U JPS61133863U (en) | 1985-02-12 | 1985-02-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1803985U JPS61133863U (en) | 1985-02-12 | 1985-02-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61133863U true JPS61133863U (en) | 1986-08-21 |
Family
ID=30506303
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1803985U Pending JPS61133863U (en) | 1985-02-12 | 1985-02-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61133863U (en) |
-
1985
- 1985-02-12 JP JP1803985U patent/JPS61133863U/ja active Pending
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