JPS61133623A - Injection into separation channel side wall - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention describes an implantation method for the ft1fl walls of an isolation trench, and more specifically, a series of ion implantations and implantations through which the trench is formed in order to achieve a sufficient dopant concentration in the sidewalls of the trench. The present invention relates to a trench sidewall injection method that uses a window narrowing process.

(2) Description of the Prior Art As the design of large scale integrated circuits progresses, a need arises for methods of creating isolation between various elements located on the same substrate that do not require large areas of the substrate. Trench isolation has evolved as a preferred isolation method in which narrow trenches filled with dielectric can be placed between elements, providing excellent isolation between adjacent elements. However, a problem with this problem is related to the segregation of dopants from the substrate along the trenches during the short oxidation process, when oxidation is required to maintain a clean interface. For example, in a boron-doped p-type substrate that includes isolation trenches filled with silicon dioxide, boron migrates from the silicon substrate into the silicon dioxide. Furthermore, due to the positive fixed charge, inversion may occur along the portion of the silicon substrate at the edge of the silicon dioxide-filled trench. Therefore, when a trench is used to separate two adjacent n-shaded regions, the presence of an n-type inversion layer between the regions acts as a conductive path and degrades the separation between the two regions.

One way to overcome this problem is to separate the elements to be
The distance is sufficient to separate the conductive path around the wall of the groove 1i111. However, when a large number of elements need to be separated on a single substrate, the amount of silicon area required for this method becomes prohibitive. In another method,
An N-channel stop is placed at the bottom of the trench to break the conductive path between the two regions to be separated. 1980
C,T on July 8th.

Preventing the formation of an inversion layer at the bottom of the groove along the interface with the substrate, as described in U.S. Pat. No. 4,211,582 issued to C.T. To do this, a p+ implant is performed at the bottom of the trench. Specifically, with the presence of p-type dopants, the boron concentration in the silicon substrate will be sufficient to prevent interface inversion even after boron segregation during subsequent oxidation. Therefore, the possibility that an n-type inversion layer will be formed at the bottom of the trench is significantly reduced.

Although this method is sufficient to remove the inversion layer at the bottom of the trench, the boron segregation that occurs along the sidewalls of the trench is due to the inversion layer along the sidewalls of the isolation trench. form a layer. Thus, there is still a conductive path between the two elements via the inverted sidewall. A remaining problem in the prior art is to provide a doping method for the sidewalls of isolation trenches that prevents sidewall inversion and provides complete isolation.

SUMMARY OF THE INVENTION The problems remaining in the prior art have been solved in accordance with the present invention. The present invention utilizes a method of implanting the sidewalls of an isolation trench, more specifically a series of ion implantations, which then narrows the window through which the trench is formed in order to achieve a sufficient level of dopant concentration in the trench sidewalls. It is related to the process of

Detailed Description FIG. 1 shows a conventional isolation trench 12 formed in a p-type substrate 10.
, in which case groove 12 may be formed by any suitable etching technique. Here, the isolation trench 12 connects the first n+ region 14 to the second n+ region along the wall of the trench 12 and through the bottom.
Necessary for separation from region 16. When silicon dioxide layer 18 is formed on the surface of trench 12 to maintain a clean interface, trench 12 may be inverted. This inversion layer is depicted in FIG. As mentioned earlier, due to the presence of this inversion layer 20, n+ region 14 and n+ region 16
A conductive path is formed therebetween. As mentioned above, the inversion layer may be removed at the bottom of trench 12 by implanting p+ region ions into the bottom of trench 12. The result of adding the p-type filler is that the concentration of p-type dopant, typically boron, present in the bottom of trench 12 is at a level sufficient to counteract boron segregation during oxidation. This increase in concentration increases the surface threshold voltage for inversion, thereby breaking the conductive path between n+ region 14 and n+ region 16. However, as mentioned above, sidewall 22 of groove 12
and 24 cannot be ion-implanted by this process. This is because the width of the isolation trench is ideally on the order of 1 micron (if not smaller) and conventional ion implantation beams cannot be tilted sufficiently to direct the ion beam onto the sidewalls. Therefore, an inversion layer is still present around the sidewalls of trench 12, and n+ region 14 and n+
A conductive path is formed between regions 16.

Figures 2-9 illustrate the process used in accordance with the present invention to implant ions into the sidewalls of isolation trenches to achieve complete isolation between two adjacent n-shaded regions. By implanting ions into the sidewalls and bottom of the trench, the boron concentration can be increased enough to eliminate the entire conductive path and ensure that no signal is transmitted between adjacent regions.

FIG. 2 shows the initial material used to form both the active devices and the isolation trenches between them. It should be understood that here, for clarity, only the process of forming isolation trenches will be discussed. There may be intervening steps in the process to form active devices on the substrate.

Referring to FIG. 2, p-type substrate 30 is oxidized to form a silicon dioxide layer 32 over the entire surface of substrate 30. Referring to FIG. Here, 150 to 300 layers are sufficient to minimize the stress caused by the subsequently deposited nitride. A silicon nitride layer 34, as described above, is subsequently deposited over the silicon dioxide layer 32.

Cocoa, layer 34 is approximately 1200 ml, 240OA (7)
It will be high. A silicon dioxide layer 36 is then deposited by decomposing the tetraethyl orthosilicate. This compound, abbreviated as TEOS, is known to those skilled in the art to form a highly compatible coating of insulating SiO2.

The silicon structure of FIG. 2 is patterned by conventional lathography techniques (not shown) to provide a narrow surface having essentially vertical sidewalls 40 and 41 and a horizontal bottom surface 42, as shown in FIG. Selective etching is performed to form openings or windows 38. In particular, a dry etch with high selectivity between dielectric and silicon may be used to form window 38. The width of window 38 is on the order of 1 micron, as shown in FIG. As mentioned above, p
Ion implantation of the filler is used to increase the p-type concentration to counteract the effects of boron segregation between the substrate and isolation trenches.

For purposes of the present invention, boron ion implantation follows the window formation process described above. Here, a first series of ion implantations is used to increase the dopant concentration along the sidewalls of the isolation trench. The ion implantation is highly directional in the vertical direction, as indicated by letter A in FIG.
Initially it is carried out at 45 Kev with a dose of i x 1o1s atoms/crl to reach a depth of 0.

The second ion implantation is approximately 40
It is carried out at 140 KeV with a dose of 1.5 X 1013 atoms/Ca to reach a depth of 0.00 A. It is well known that this type of ion implantation produces a Gaussian doping profile. Therefore, boron implants are used to flatten the Gaussian distribution of boron ions and make them relatively uniform, as well as to ensure sufficient dopant concentration along the sidewalls of the isolation trenches to be formed in subsequent process steps. This is followed by heat treatment. It should be noted that any number of ion implantations may be used to effect sidewall doping. Here, as mentioned above, two injections have been found to be sufficient for the purposes of the present invention. Furthermore, the 45 and 140K mentioned above
The energy of ev is considered as an example only. Many other implant energy combinations may be used to practice the invention.

Doping of the trench sidewalls according to the invention is performed by narrowing the width of the window 38 before forming the isolation trench. Therefore,
Following the ion implantation described above, the opening of window 38 is narrowed using a conformal coating of thin masking material 44 that is formed to form the structure shown in FIG.

TE01 (tetraethyl orthosilicate) may be used for the conformal coating 44. This is because it is known to form a high quality conformal coating. In particular, 1
A thickness of 7808 layers 44 to 0.000 has been found to be sufficient for purposes of the present invention. 7808 layer 44 is subsequently removed by an anisotropic dry etching process so that only the portions of layer 44 deposited on sidewalls 40 and 41 of window 38 remain.

FIG. 6 shows the resulting structure, which includes side walls 40 and 40 respectively.
and the TEO8 region (or edge) along 41. 6th
As shown, the width of window 38 is reduced to W.

Here, the side walls 40 and 41 are spaced a distance y from the edge of the window 38.
will be placed at. In other words, the width of window 38 is the amount 2y
It's only narrower. Here, the value y depends on the TEO8 layer 44 layer thickness 4.

If the TEO8 edges 46 and 48 were not present, the isolation grooves would be as shown by vertical lines 50 and 52 in FIG. Since these sidewalls are very close to the Gaussian distributed dopant N tails, only a very low concentration of boron will be implanted into the sidewalls. This amount of boron was found not to be sufficient to counteract the effects of boron precipitation, resulting in slight overetching of the silicon trenches beyond the mask edges, thus not preventing trench sidewall inversion.

Therefore, as mentioned above, the isolation trench is located at the TEO8 edge 46.
and 48 so that the side walls of the groove (which is still being formed) are aligned along vertical lines 54 and 56. Therefore, by using the TEO8 edges 46 and 48 to narrow the window 38, a higher concentration of boron is implanted into the sidewalls of the isolation trench and the TEO8 edges 46 and 48 are used to narrow the window 38.
The amount of E01 deposited (and thus the subsequent size of edges 46 and 48) will control the sidewall dopant concentration. Specifically, because sidewalls 54 and 56 contain peak doping concentrations, the amount of boron implanted into sidewalls 54 and 56 by the present technique is more than sufficient to counteract the effects of boron segregation, and to prevent reversal.

To complete the process, the actual isolation grooves are formed as shown in FIG. Specifically, the structure of FIG. 6 is etched to a depth of about 6,000 mm using an anisotropic dry etching process to form an isolation trench 60 including vertical walls 54 and 56 and a horizontal bottom 58. Following the anisotropic groove etch, 1808 with TEO8 edges 46 and 48
Layer 36 is completely etched away. In this case, buffered hydrofluoric acid may be used as the etchant. The resulting structure is shown in FIG. The grooves 60 are then oxidized (after chemical cleaning) to form the grooves 60 as shown in FIG.
A thin silicon dioxide layer 61 (to about 1000) is formed around the surface of 0. The silicon dioxide layer 61 has a groove 60
and the dielectric material that is subsequently deposited into the bay 60. After oxidizing trench 60 to form layer 61, ion implantation is added to increase the boron concentration at the bottom of trench 60 and prevent formation of an inversion layer in this region.

For example, at a dose of 6 X 10” atoms/crl 3
Ion implantation at 0 KeV results in a boron concentration along the horizontal bottom 58 of trench 60, as shown in FIG.

In summary, according to the ion implantation process of the present invention, a plurality of p+ regions 6264 and 66 with sidewalls 54 and 56 and bottom 58, respectively, counteracts the segregation of boron present in substrate 30 into isolation trenches 60. Contains sufficient dopant concentration for As shown in FIG. 9, an insulating material is then deposited uniformly over the entire wafer surface. This not only fills the grooves 60, but also produces a flat surface. As mentioned above, TE01 is known for its compatible coating properties and may be used as the insulating material 70. Actually, TE0
Several layers of TE01 are deposited to increase density and reduce stress associated with thick layers of TE01, with an anneal between each deposition. The planarized wafer is then subjected to a controlled, uniform oxide etch, preferably by a dry etch, until the silicon nitride layer 34 is exposed. To prevent etching through silicon nitride layer 34 to silicon dioxide layer 32, endpoint detection was used in this process to indicate when silicon nitride layer 34 was reached. Under normal circumstances, silicon nitride layer 34 is 1
Thicknesses up to 200 and 2400, therefore, provide sufficient N sponge or stop layer to protect the underlying silicon dioxide layer 32. Hot phosphoric acid is used to remove silicon nitride layer 34. This etch is applied to silicon dioxide.
High selectivity. FIG. 10 shows a cross section of the final planarized structure.

[Brief explanation of the drawing]

Figure 1 is a diagram showing a cross section of a conventional separation groove, Figure 2-10
The figures show cross-sections of the structure obtained at various times during the fabrication of isolation trenches formed according to the invention. 30...p-type substrate 32.36.61...silicon dioxide layer 34...silicon nitride layer 38...window 40.41...side wall 44...mask material 44...TEO8 layer 62 .64.66...p+ shape region 19) FIG, 4 FIG, 6 FIG, 7 FIG, 9 FIG, t.

Claims (1)

[Claims] 1. A method of creating an isolation trench having essentially vertical sidewalls in a semiconductor substrate, the method comprising: (a) depositing a predetermined thickness of mask material on the substrate; (b) patterning the masking material to specify the location of the separation trench; (c) passing the masking material formed in step (a) through the masking material;
forming rows of windows separated according to the pattern formed in step (b), said windows having essentially vertical sidewalls and an essentially horizontal bottom surface coincident with a top surface of said substrate; (d) ) performing a series of ion implantations through the window at various depths in the substrate to implant ions that correspond to essentially vertical trench sidewalls; (e) a coating formed in step (a); (f) depositing the remaining conformal coating completely on the vertical sidewalls of the window, such that the coating is also deposited in the window formed in step (c); and etching the horizontally disposed conformal coating so as to also cover a predetermined portion of the bottom of the window, the etched conformal coating thereby forming a width of the window. (g) etching the substrate using the masking material to create a row of separated isolation trenches, the isolation trenches having a width determined by the portion of the window not covered by the conformal coating; (h) removing the remaining portion of the conformal coating; (i) oxidizing the isolation trench; (j) implanting ions corresponding to the essentially horizontal bottom of the isolation trench; (k) thermally oxidizing and subsequently etching the substrate to completely fill the isolated isolation trenches and planarize the final structure. A method characterized by: 2. In the method described in claim 1,
A method characterized in that the substrate is a p-type semiconductor material containing a boron dopant, and boron is used as the ion implantation species in steps (d) and (h). 3. In the method described in claim 1,
A method characterized in that two injections are used in the series of injections in step (d). 4. In the method described in claim 3,
The first implant used an energy of 45 KeV to obtain an ion implantation concentration of 1 x 10^1^3 atoms/cm^2, and the second implant used 1.5 x 10^1^3 atoms/cm^2.
A method characterized in that an energy of 140 KeV is used to obtain an ion implantation concentration of . 5. In the method described in claim 1,
A method characterized in that the window formed in step (c) has a width on the order of 1 micron before forming the conformal coating in step (e). 6. In the method described in claim 1,
Furthermore, (1) a method characterized by including the step of thermally processing the series of ion implantations in step (d) before performing step (e). 7. In the method described in claim 1,
The mask material in step (a) includes a layer of silicon dioxide formed by oxidizing the substrate, a layer of silicon nitride deposited on the silicon dioxide layer, and a layer of tetraethyl nitride deposited on the silicon nitride layer. Orthosilicate (
TEOS). 8. In the method described in claim 7,
A method characterized in that the silicon dioxide layer is about 300 Å thick, the silicon nitride layer is about 200 Å thick, and the TEOS layer is about 500 Å thick. 9. In the method described in claim 1,
A method characterized in that the conformable coating of step (e) consists of tetraethyl orthosilicate, designated as TEOS. 10. The method of claim 9, wherein the conformal coating has a thickness of about 1000 Å. 11. The method according to claim 1, characterized in that tetraethyl orthosilicate is used in step (k).