JPS61129849A - Leadless semiconductor device - Google Patents

Leadless semiconductor device

Info

Publication number
JPS61129849A
JPS61129849A JP59251107A JP25110784A JPS61129849A JP S61129849 A JPS61129849 A JP S61129849A JP 59251107 A JP59251107 A JP 59251107A JP 25110784 A JP25110784 A JP 25110784A JP S61129849 A JPS61129849 A JP S61129849A
Authority
JP
Japan
Prior art keywords
glass tube
electrode
large diameter
small
projections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59251107A
Other languages
Japanese (ja)
Inventor
Kaoru Nakagawa
中川 薫
Yoshio Yamamoto
山本 善生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59251107A priority Critical patent/JPS61129849A/en
Publication of JPS61129849A publication Critical patent/JPS61129849A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent cracks of a glass tube by always keeping a gap between the glass tube end and the large diameter part of each electrode by a method wherein the the side surface of the large diameter part of each electrode on the glass tube side is provided with a plurality of projections coming into contact with the glass tube end with small areas. CONSTITUTION:Metallic wires, produced by coating Fe-Ni alloys easy of fitting to glass with Cu, processed by heating are used for a pair of electrodes 21a, 21b of the titled device. The side-end surfaces of electrode large diameter parts 22a, 22b corresponding to the projecting direction of small diameter projections 23a, 23b of these electrodes 21a, 21b are provided with four conical small projections 24a-24d and 25a-25d, respectively. These small projections 24a-24d, 25a-25d are integrally formed with an electrode-forming die provided with recesses corresponding to the projections shapes. Then, the cracks of the glass tube 26 are prevented by always keeping a gap between the end of the glass tube 26 and each of the electrode large diameter parts 22a, 22b.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、例えば半導体チップでなる整流素子を挾持
した電極部材間をガラス管で気密封止してなるリードレ
スガラス封止ダイオード等のり一ドレス半導体装置に関
する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a glueless glass-sealed diode, such as a leadless glass-sealed diode, in which electrode members sandwiching a rectifying element made of a semiconductor chip are hermetically sealed with a glass tube. Related to semiconductor devices.

〔発明の技術的背景〕[Technical background of the invention]

一般に、上記のようなり一ドレスガラス封止ダイオード
は、第3図に示すように構成されている。すなわち、大
径部11a、11bの中央に突出する小径部12&、1
1bを有する一対の電極13a、13bを、その小径部
Jja。
Generally, the single-dress glass-sealed diode described above is constructed as shown in FIG. That is, the small diameter portions 12&, 1 protrude from the center of the large diameter portions 11a, 11b.
A pair of electrodes 13a, 13b having a small diameter portion Jja.

11bの先端で対向させる。そして、上記一対の電極1
3a、13bの小径部12a、11b先端面の相互間に
、整流回路の形成された半導体チップ14t−圧接挾持
させ、これと共に、上記半導体チ゛ツブ14を含む電極
小径部12h。
The tips of 11b are opposed to each other. Then, the pair of electrodes 1
A semiconductor chip 14t on which a rectifier circuit is formed is pressed and clamped between the tip surfaces of the small diameter portions 12a and 11b of the small diameter portions 12a and 11b of the electrodes 3a and 13b, and together with this, the small diameter electrode portion 12h including the semiconductor chip 14.

12bの周囲をガラス管15で囲む。この後、加熱処理
によりそれぞれの電極小径部jZasJjt)Kガラス
管15を密着させ、上記半導体チップ14を気密封止し
てリードレスガラス封とダイオードを構成している。こ
の場合、上記気密封止時においては、ダイオードはその
電極小径部12a、12bの突出方向に対応して直立し
た状態で封止治具内に設置され加熱されるので、上記ガ
ラス管15は下側の電極大径部11aに片寄って密着さ
れる。
12b is surrounded by a glass tube 15. Thereafter, the small diameter portions of the electrodes (jZasJjt)K glass tubes 15 are brought into close contact with each other by heat treatment, and the semiconductor chip 14 is hermetically sealed to form a leadless glass seal and a diode. In this case, at the time of hermetically sealing, the diode is installed in the sealing jig in an upright state corresponding to the protruding direction of its electrode small diameter portions 12a and 12b and is heated, so that the glass tube 15 is lowered. It is brought into close contact with the electrode large diameter portion 11a on the side.

〔背景技術の問題点〕[Problems with background technology]

しかしこのようにガラス管15が一方の電極大径部11
aに片寄って密着してしまうと、例えば加熱処理後の冷
却時において、電極13a。
However, in this way, the glass tube 15 is
If the electrode 13a is brought into close contact with the electrode 13a, for example, during cooling after heat treatment.

13F)よりガラス管15の熱膨張係数が大きいために
、ガラス管15がその管軸方向Xに縮み、電極大径部1
1aとの密着部分においてひび割れ16a、16b、・
・・が発生してしまう。このため、装品外銭を悪くする
ばかりでなく、歩留り向上を妨げる大きな原因となって
いる。
13F), the glass tube 15 shrinks in the tube axis direction X, and the electrode large diameter portion 1
Cracks 16a, 16b, .
... will occur. For this reason, it not only deteriorates the quality of the accessories, but also becomes a major cause of hindering improvement in yield.

〔発明の目的〕[Purpose of the invention]

この発明は上記すような問題点く鑑みなされたもので、
ガラス管とit電極大径部を密着させることなく、ガラ
ス管のひび割れ発生を防とすることができるようになる
リードレス半導体装置を提供することを目的どする。
This invention was made in view of the problems mentioned above.
It is an object of the present invention to provide a leadless semiconductor device that can prevent cracking of a glass tube without bringing the glass tube and the large diameter part of an IT electrode into close contact with each other.

〔発明の概要〕 すなわち、この発明に係わるリードレス半導体装置は、
それぞれの電極大径部のガラス管側の側面に、ガラス管
端部に小面積で接触する複数の突起部を設け、ガラス管
両端部とそれぞれの電極大径部との間が常時間隙を保持
した状態になるようにしたものである。
[Summary of the invention] That is, the leadless semiconductor device according to the present invention includes:
A plurality of protrusions are provided on the glass tube side of the large diameter portion of each electrode to maintain a constant gap between both ends of the glass tube and the large diameter portion of each electrode. It was designed to be in the same state as before.

〔発明の実施例〕[Embodiments of the invention]

以下図面によりこの発明の一実施例を説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図はその断面構成を示すもので、このリードレス半
導体装置はそれぞれ対向する一対の′Itg21a、2
1bを備えている。このそれぞれの電極21am21b
は、例えばガラス材と馴染みの良好なFs−Ni1合金
にCu被覆されたジュメット線等の金、礪線に、ヘッデ
ィング加工を施して形成されるもので、大径部22a。
FIG. 1 shows its cross-sectional structure, and this leadless semiconductor device has a pair of 'Itg21a, 2' facing each other.
1b. These respective electrodes 21am21b
The large diameter portion 22a is formed by applying a heading process to a gold wire such as a Dumet wire coated with Cu on an Fs-Ni1 alloy that is compatible with glass materials.

2jbおよびその中央に立設される小径の突出部23e
t、23bから断面T字状に形成される。
2jb and a small diameter protrusion 23e erected at the center thereof.
It is formed into a T-shaped cross section from t and 23b.

ここで、上記小径突出部23 a # 2 j bの突
出方向に対応する電極大径部22&、22bf)flA
端面には、それぞれ・に例えば4つの円錐状の小突起2
4a 〜24tlおよび25a 〜25dを設ける(第
2図参照)。この場合、上記それぞれの小突起24a 
〜246 ・25a 〜256は、その突起形状に対応
する凹部を設けた電極形成用の金型(図示せず)にて一
体的に形成される。
Here, the electrode large diameter portions 22&, 22bf)flA corresponding to the protrusion direction of the small diameter protrusion 23a #2jb
For example, four small conical protrusions 2 are provided on each end face.
4a to 24tl and 25a to 25d (see FIG. 2). In this case, each of the small protrusions 24a
246 and 25a to 256 are integrally formed using an electrode forming mold (not shown) provided with a recess corresponding to the shape of the protrusion.

上記一対の*[jla、2xbはそれぞれその架出部2
3a、23bの先端を対向して配置されるもので、この
電、唖突出部23a、23bの先端部相互間には、半導
体チップ14を圧接挾持させる。そして、この半導体チ
ップ14を含む電極突出部23a、23bの周囲をガラ
ス管26で囲む。この場合、ガラス管26の両端部には
、上記それぞれの゛電極大径部22a、22bに形成し
た複数の小突起24a〜24C1および25a〜25d
の先端が小面積で接触するように々す、t′!@大径部
22 a e 22 bとガラス管26との間には、上
記小突起、?45L〜24d・25a〜25dの高さに
対応する間隙tが保持されるように表る。この後、上記
電@ 21 a #2Zbおよび半導体チップI4およ
びガラス管26で構成される半導体装置を、図示しない
気密封止治具内に設置して加熱処理を施し、電極突出部
23a、23bの外周面にガラス管26を密着させる。
The above pair of *[jla, 2xb are respectively the overhanging parts 2
The tips of the protrusions 3a and 23b are arranged to face each other, and the semiconductor chip 14 is clamped between the tips of the protrusions 23a and 23b. Then, the electrode protrusions 23a and 23b including the semiconductor chip 14 are surrounded by a glass tube 26. In this case, at both ends of the glass tube 26, there are a plurality of small protrusions 24a to 24C1 and 25a to 25d formed on the large diameter electrode portions 22a and 22b.
so that the tips of t'! touch in a small area. @ Between the large diameter portion 22 a e 22 b and the glass tube 26 is the small protrusion, ? A gap t corresponding to the heights of 45L to 24d and 25a to 25d is maintained. Thereafter, the semiconductor device composed of the electrode @ 21 a #2Zb, the semiconductor chip I4, and the glass tube 26 is placed in an airtight sealing jig (not shown) and subjected to heat treatment to seal the electrode protrusions 23a and 23b. The glass tube 26 is brought into close contact with the outer peripheral surface.

すなわち、このように構成されるリードレス半導体装置
においては、そわぞれ対向する電極大径部22a、22
bの側端面に、ガラス管26の両端部に小面積で接触す
る複数の小突起24a〜24d・25a〜25dを設け
るようにしたので、加熱処理によるガラス管26と電極
21a、21bとの密着時においても、ガラス管26は
それぞれの電極大径部22a、’22bとの間に7i!
度な間隙tを維持した状態でそれぞれの小径突出部23
a、23bの外周面に密着するようになる。
That is, in the leadless semiconductor device configured in this way, the large diameter portions 22a, 22 of the electrodes are opposite to each other.
A plurality of small protrusions 24a to 24d and 25a to 25d that contact both ends of the glass tube 26 in a small area are provided on the side end surface of the glass tube 26, so that the glass tube 26 and the electrodes 21a and 21b come into close contact with each other due to heat treatment. Even at times, the glass tube 26 is 7i!
Each of the small diameter protrusions 23 while maintaining a certain gap t.
It comes into close contact with the outer peripheral surfaces of a and 23b.

したがって、ガラス管26と電極大径部22a。Therefore, the glass tube 26 and the electrode large diameter portion 22a.

22’Oとが密着することがないので、製品外璽が良く
なるばかりでなく、例えば、気密封止後の冷却時におい
ても、ガラス管26の縮みによりひび割れ不良が発生す
ることはない。ここで、例えば200個のリードレスガ
ラス封とダイオードを製造した際に、従来では4個もの
ひび割れ不良が発生していたのに対し、この実施例では
その不良個数を皆無にすることができる。
Since the glass tube 22'O does not come into close contact with the glass tube 26, not only does the outer seal of the product improve, but also, for example, no cracks occur due to shrinkage of the glass tube 26 even during cooling after hermetically sealing. Here, for example, when manufacturing 200 leadless glass seals and diodes, as many as four crack defects occurred in the conventional method, but in this embodiment, the number of defects can be completely eliminated.

尚、上記実施例では、そ、れぞれの電極大径部22a、
22bに4つの円錐状小突起24a〜24d・25a〜
、?5dを設けるようにしたが、この小突起24a〜2
4cl−25a〜25dの形状および個数は限定され゛
るものではない。
In addition, in the above embodiment, each of the electrode large diameter portions 22a,
22b has four conical small protrusions 24a to 24d, 25a to
,? 5d, but these small protrusions 24a-2
The shape and number of 4cl-25a to 25d are not limited.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、それぞれの電極大径部
のガラス管側の側面に、ガラス旨端部に小面積で接触す
る複数の突起部を設け、ガラス管両端部とそれぞれの1
!甑大径部との間が常時間隙を保持する状態としたので
、例えば加熱処理を施した場合にも、ガラス管と!極大
径部とが密着することなくガラス管のひび割れ発生を防
とすることができ、製品歩留りの向上が可能とカるリー
ドレス半導体装置を提供できる。
As described above, according to the present invention, a plurality of protrusions are provided on the glass tube side side of each electrode large diameter portion, and the plurality of protrusions are provided in contact with the glass tube end portion in a small area, and
! Since a gap is always maintained between the large diameter part of the koshi and the glass tube, even when heat treatment is applied, for example, the gap between the glass tube and the large diameter part is maintained. It is possible to provide a leadless semiconductor device in which cracking of the glass tube can be prevented without close contact with the maximum diameter portion, and product yield can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例に係わるリードレス半導体
装置を示す断面構成図、第2図は上記リードレス半導体
装置の一方の電極を示す平面図、第3図は従来のリード
レス半導体装置を示す断面構成図である。 14−−−半導体チップ、21 a 、 2 l b 
−電極、22 a 、 22 b ・−・大径部、23
 a 、 23 b・−小径突出部、24a〜2イa、
J5a 〜zsd−・・小突起、26・・・ガラス管。 出願人代理人  弁理士 鈴 江 武 彦゛第1 」パ ーーJミ 第2図 ゴ22a 24a 24b  ”。 ] −ニ下11b −堪 」 =26 >4a
FIG. 1 is a cross-sectional configuration diagram showing a leadless semiconductor device according to an embodiment of the present invention, FIG. 2 is a plan view showing one electrode of the leadless semiconductor device, and FIG. 3 is a conventional leadless semiconductor device. FIG. 14---Semiconductor chip, 21a, 2lb
-Electrode, 22a, 22b...Large diameter part, 23
a, 23 b - small diameter protrusion, 24a to 2a,
J5a ~zsd-... small projection, 26... glass tube. Applicant's agent Patent attorney Suzue Takehiko ゛1 ``Par-Jmi 2nd figure 22a 24a 24b ''.] - 2 lower 11b - resistant = 26 > 4a

Claims (1)

【特許請求の範囲】[Claims]  大径部の中央に突出部を有する一対の電極と、この一
対の電極突出部が互いに対向して配置されこの突出部相
互間に挾持される半導体素子と、この半導体素子を含む
上記電極突出部の周囲を囲むガラス管と、上記それぞれ
の電極大径部に設けられ上記ガラス管の両端部に小面積
で接触して間隙を保持する複数の突起部とを具備したこ
とを特徴とするリードレス半導体装置。
a pair of electrodes having a protrusion at the center of a large diameter portion; a semiconductor element with the pair of electrode protrusions facing each other and sandwiched between the protrusions; and the electrode protrusion including the semiconductor element. A leadless device comprising: a glass tube surrounding the periphery of the electrode; and a plurality of protrusions provided on the large diameter portion of each of the electrodes and contacting both ends of the glass tube in a small area to maintain a gap. Semiconductor equipment.
JP59251107A 1984-11-28 1984-11-28 Leadless semiconductor device Pending JPS61129849A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59251107A JPS61129849A (en) 1984-11-28 1984-11-28 Leadless semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59251107A JPS61129849A (en) 1984-11-28 1984-11-28 Leadless semiconductor device

Publications (1)

Publication Number Publication Date
JPS61129849A true JPS61129849A (en) 1986-06-17

Family

ID=17217748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59251107A Pending JPS61129849A (en) 1984-11-28 1984-11-28 Leadless semiconductor device

Country Status (1)

Country Link
JP (1) JPS61129849A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943558A (en) * 1982-09-02 1984-03-10 Sumitomo Electric Ind Ltd Diode electrode part

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943558A (en) * 1982-09-02 1984-03-10 Sumitomo Electric Ind Ltd Diode electrode part

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