JPS61127434U - - Google Patents

Info

Publication number
JPS61127434U
JPS61127434U JP1066785U JP1066785U JPS61127434U JP S61127434 U JPS61127434 U JP S61127434U JP 1066785 U JP1066785 U JP 1066785U JP 1066785 U JP1066785 U JP 1066785U JP S61127434 U JPS61127434 U JP S61127434U
Authority
JP
Japan
Prior art keywords
thermistor
multiplexer
resistor
power supply
drive power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1066785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1066785U priority Critical patent/JPS61127434U/ja
Publication of JPS61127434U publication Critical patent/JPS61127434U/ja
Pending legal-status Critical Current

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  • Measuring Temperature Or Quantity Of Heat (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の一実施例を示す図、第2
図は従来のサーミスタ回路を示す図である。 図において、1はサーミスタ駆動電源、2,2
′は抵抗、3,3′,3″はマルチプレクサ、4
,4′はサーミスタ、5は抵抗、6は制御回路、
端子1は信号基準点、端子2はサーミスタ回路の
信号出力端子である。なお、各図中同一符号は同
一又は相当部分を示す。
Figure 1 is a diagram showing an embodiment of this invention;
The figure shows a conventional thermistor circuit. In the figure, 1 is the thermistor drive power supply, 2,
' is a resistor, 3, 3', 3'' is a multiplexer, 4
, 4' is a thermistor, 5 is a resistor, 6 is a control circuit,
Terminal 1 is a signal reference point, and terminal 2 is a signal output terminal of the thermistor circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] サーミスタ駆動電源、マルチプレクサ、制御回
路、抵抗、サーミスタで構成されるサーミスタ回
路において、サーミスタ駆動電源と、サーミスタ
駆動電源に接続された低抗と、この抵抗に接続さ
れたマルチプレクサと、マルチプレクサに接続さ
れたサーミスタと、サーミスタに接続された抵抗
と、サーミスタとマルチプレクサとの接続点、あ
るいはサーミスタと抵抗の接続点へ入力端子が接
続されたマルチプレクサと、上記のマルチプレク
サを制御する制御回路とで構成されることを特徴
とするサーミスタ回路。
In a thermistor circuit consisting of a thermistor drive power supply, a multiplexer, a control circuit, a resistor, and a thermistor, the thermistor drive power supply, a low resistor connected to the thermistor drive power supply, a multiplexer connected to this resistor, and a Consists of a thermistor, a resistor connected to the thermistor, a multiplexer whose input terminal is connected to the connection point between the thermistor and the multiplexer, or the connection point between the thermistor and the resistance, and a control circuit that controls the multiplexer. A thermistor circuit featuring:
JP1066785U 1985-01-29 1985-01-29 Pending JPS61127434U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1066785U JPS61127434U (en) 1985-01-29 1985-01-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1066785U JPS61127434U (en) 1985-01-29 1985-01-29

Publications (1)

Publication Number Publication Date
JPS61127434U true JPS61127434U (en) 1986-08-09

Family

ID=30492062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1066785U Pending JPS61127434U (en) 1985-01-29 1985-01-29

Country Status (1)

Country Link
JP (1) JPS61127434U (en)

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