JPS61127165A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61127165A JPS61127165A JP59248352A JP24835284A JPS61127165A JP S61127165 A JPS61127165 A JP S61127165A JP 59248352 A JP59248352 A JP 59248352A JP 24835284 A JP24835284 A JP 24835284A JP S61127165 A JPS61127165 A JP S61127165A
- Authority
- JP
- Japan
- Prior art keywords
- region
- layer
- transistor
- light
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 34
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000010410 layer Substances 0.000 abstract description 48
- 229910052751 metal Inorganic materials 0.000 abstract description 35
- 239000002184 metal Substances 0.000 abstract description 35
- 238000006243 chemical reaction Methods 0.000 abstract description 16
- 230000000694 effects Effects 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract 1
- 239000002344 surface layer Substances 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 description 9
- 239000002356 single layer Substances 0.000 description 6
- 239000000969 carrier Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
- H01L31/02164—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors for shielding light, e.g. light blocking layers, cold shields for infrared detectors
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）発明の目的
〔産業上の利用分野〕
この発明は、充電変換に使用されるバイポーラ型半導体
装置に関し、殊に、その周辺部等から入射した光が光電
変換してこれによって生じる光電流が基本素子の作動に
影響を与えることを防ぐように、ダミーホトダイオード
が形成されてなる半導体装置に関する。Detailed Description of the Invention (a) Purpose of the Invention [Field of Industrial Application] The present invention relates to a bipolar semiconductor device used for charge conversion, and in particular, the present invention relates to a bipolar semiconductor device used for charge conversion. The present invention relates to a semiconductor device in which a dummy photodiode is formed to prevent photocurrent generated thereby from affecting the operation of basic elements.
従来、光電変換に使用されるバイポーラＩＣ素子やホト
ダイオードとバイポーラＩＣを一体化した素子のバイポ
ーラ形半導体装置（Ｉａ）の構造は、その要部の構成断
面を第４図に示すように、Ｐ型基板（１ａ）上に、Ｎ＋
層、Ｎ８、Ｐ”層、配線メタルである一層メタル、一層
絶縁°膜、二層絶縁膜及び遮光作用をする二層メタル（
２ａ）を設けたものであり、トランジスタ（３ａ）や抵
抗（４ａ）などの基本素子を形成していた。尚、集積回
路（Ｉａ）の仕上げ時に、その周辺部（５ａ）で、ダイ
ヤモンド粉をつけた特殊な回転砥石で分割カットする、
いわゆるダイシングが行われる。このダイシング時に、
回転砥石が柔らかいメタルによって目づまりすることを
防ぐために、二層メタル（２ａ）を周辺部（５ａ）まで
は届かせず、二層メタル（２ａ）が周辺部（５ａ）を覆
わないようにされていた。Conventionally, the structure of a bipolar semiconductor device (Ia), which is a bipolar IC element used for photoelectric conversion or an element that integrates a photodiode and a bipolar IC, is a P-type semiconductor device (Ia), as shown in FIG. On the substrate (1a), N+
layer, N8, P'' layer, single layer metal that is wiring metal, single layer insulation film, double layer insulation film, and double layer metal that has a light shielding effect (
2a), forming basic elements such as a transistor (3a) and a resistor (4a). In addition, when finishing the integrated circuit (Ia), the peripheral part (5a) is cut into parts using a special rotating grindstone coated with diamond powder.
So-called dicing is performed. During this dicing,
In order to prevent the rotating grindstone from being clogged with soft metal, the two-layer metal (2a) does not reach the peripheral part (5a), and the two-layer metal (2a) does not cover the peripheral part (5a). was.
トランジスタ（３ａ）や抵抗（４ａ）などの基本素子は
、二層メタル層（２ａ）方向からは光がさえぎられてい
て、その動作が光によって影響を受けることはない。Basic elements such as the transistor (3a) and the resistor (4a) are blocked from light from the direction of the two-layer metal layer (2a), and their operations are not affected by light.
しかし、光（６ａ）は、二層メタル層（２ａ）で覆われ
ていない部分である周辺部（５ａ）から吸収され、ここ
で光電変換が行われて、その結果、充電変換で発生した
少数キャリア（光電流）の一部が再結合せずに移動して
トランジスタ（３ａ）、抵抗（４ａ）等の基本素子の動
作に影響を与え、不安定なものにさせるという問題があ
った。However, the light (6a) is absorbed from the peripheral part (5a), which is the part not covered by the double metal layer (2a), and photoelectric conversion occurs here, resulting in a small number of There is a problem in that some of the carriers (photocurrent) move without being recombined and affect the operation of basic elements such as the transistor (3a) and the resistor (4a), making them unstable.
ところで、少数キャリア（光電流）の移動距離は拡散長
に比例し、例えば、Ｐ型半導体中における拡散長は、
Ｌ＝８５４（比抵抗Ｐ＝１Ω−ａｍ）
である。よって、光（６ａ）の入射位置からトランジス
タ（３ａ）、抵抗（４ａ）等の基本素子までの距離が拡
散長しより小さければ、入射した光が光電変換を起こし
、これによって発生した少数キャリア（光電流）は、上
記基本素子のところまで移動し、上記基本素子は動作に
影響を受けることになる。例えば、トランジスタ（３ａ
）の場合では、光（６ａ）からトランジスタ（３ａ）の
動作が影響を受ける有効領域（１ａ）は斜線部分で示し
た部分である。By the way, the moving distance of minority carriers (photocurrent) is proportional to the diffusion length, and for example, the diffusion length in a P-type semiconductor is L=854 (specific resistance P=1 Ω-am). Therefore, if the distance from the incident position of light (6a) to basic elements such as transistors (3a) and resistors (4a) is smaller than the diffusion length, the incident light will cause photoelectric conversion, and the minority carriers ( photocurrent) will travel to the elementary element, and the operation of the elementary element will be affected. For example, a transistor (3a
), the effective area (1a) where the operation of the transistor (3a) is affected by the light (6a) is the shaded area.
ある基本素子と隣り合うもう一つの基本素子との光に感
じる有効領域の境界は、両者の中央部で近似される。こ
こでは、トランジスタ（３ａ）と抵抗（４ａ）との有効
領域の境界は、（８ａ）となる。The boundary of the effective light-sensing area between one basic element and another adjacent basic element is approximated by the center of the two. Here, the boundary of the effective area between the transistor (3a) and the resistor (4a) is (8a).
また、ＰｆＪ！ｌ板（１）である例えばシリコン中では
、光の強度が減衰する。よって、光の入射位置に近い基
本素子はど、光電変換された光電流による影響を多く受
けることになる。Also, PfJ! The intensity of light is attenuated in, for example, silicon, which is the l plate (1). Therefore, basic elements close to the light incident position are more affected by the photoelectrically converted photocurrent.
以上より、基本素子の動作が光電変換して生じた光電流
による影響を回避するように、基本素子であるトランジ
スタ（３ａ）の動作が影響を受ける有効領域（１ａ）ま
で遮光性の二層メタル（２ａ）で覆い、更に入射する光
の減衰を考慮して周辺部（５ａ）を有効領域（７ａ）か
ら十分な距離の位置となるようにしていた。しかし、こ
れでは、集積回路は容積が小さいという特長が損なわれ
、かつ少数キャリア（光電流）からの影響が矢張りおこ
るという問題があった。From the above, in order to avoid the influence of the photocurrent generated by photoelectric conversion on the operation of the basic element, a light-shielding double-layer metal layer is used up to the effective area (1a) where the operation of the transistor (3a), which is the basic element, is affected. (2a), and in consideration of attenuation of incident light, the peripheral portion (5a) was positioned at a sufficient distance from the effective area (7a). However, with this, the advantage of integrated circuits having a small volume is lost, and there is a problem in that they are heavily influenced by minority carriers (photocurrent).
（ロ）発明の構成
この発明の構成は、半導体基板にバイポーラ集積回路を
形成する半導体装置において、外部から光が入射しうる
半導体基板部分に形成されＰＮ接合する、前記半導体基
板とは逆の４電型を有する半導体層と、
前記ＰＮ接合する両生導体層を短絡する短絡手段と、を
備えたことを特徴とする半導体装置である。(B) Structure of the Invention The structure of the present invention is that in a semiconductor device in which a bipolar integrated circuit is formed on a semiconductor substrate, a PN junction is formed in a portion of the semiconductor substrate into which light can enter from the outside, and a four-layer A semiconductor device comprising: a semiconductor layer having an electric type; and shorting means for shorting the amphibic conductor layer forming the PN junction.
つまり、この発明は、遮光メタルの被覆のない部分にダ
ミーホトダイオードを形成させ、ここから入射した光は
充電変換により光電流に変わるが、この光電流が」二層
ダミーホトダイオードによって消費され、他の基本素子
の動作に影響を及ぼさないようにさせたものである。In other words, in this invention, a dummy photodiode is formed in the uncovered part of the light-shielding metal, and the light incident thereon is converted into a photocurrent by charge conversion, but this photocurrent is consumed by the double-layer dummy photodiode and other This is done so that it does not affect the operation of the basic elements.
（実施例）
以下、第１〜３図に示づ実施例によってこの発明を説明
するが、これによってこの発明が限定されるものではな
い。(Examples) The present invention will be described below with reference to Examples shown in FIGS. 1 to 3, but the present invention is not limited thereto.
本発明の光が照射されて使用されるバイポーラ型半導体
装１（１）の構造は、その要部の構成断面を第１図に示
すように、Ｐ型基板（１）上に、Ｎ’層、Ｎｉｌ！ｆｆ
、Ｐ＋層、一層絶縁膜、一層メタル、二層絶縁膜、及び
二層メタル（′２Ｊを設けたもので、これによってこの
半導体装置（１）をつくっている基本素子のトランジス
タ（３）や抵抗（４）と、更にダミーホトダイオード■
が形成されている。The structure of the bipolar semiconductor device 1 (1) used by being irradiated with the light of the present invention is as shown in FIG. , Nil! ff
, P+ layer, single-layer insulating film, single-layer metal, double-layer insulating film, and double-layer metal ('2J), which make up the basic elements such as transistors (3) and resistors that make up this semiconductor device (1). (4) and a dummy photodiode■
is formed.
尚、Ｐ型基板（１）、Ｎ奎層、ＮＷＪ及びＰ＋層は例え
ばシリコンからできていて光に感応し、−１Ｗ絶縁膜は
例えばシリコンを熱酸化させて、二層絶縁膜は例えばポ
リイミド樹脂がコーティングさせることでつくられてお
り、一層メタルは集積回路で配線の働きをし二層メタル
（′２Ｊは遮光の働きをして宋梢回路周辺部（５）を除
いて遮光が必要な部分を覆っており、共に例えばアルミ
ニュウムから出来ている。The P-type substrate (1), the N-layer, the NWJ, and the P+ layer are made of, for example, silicon and are sensitive to light, the -1W insulating film is made of, for example, silicon thermally oxidized, and the two-layer insulating film is made of, for example, polyimide resin. The first layer of metal acts as a wiring in the integrated circuit, and the second layer of metal ('2J acts as a light shield, and covers areas that require light shielding except for the peripheral area of the Song Jue circuit (5). , both of which are made of aluminum, for example.
二層メタル（２は、もし光が入射すると光電変換を起こ
し、これによって光電流が発生し、この光電流が少数キ
ャリアによって運ばれることよりトランジスタ（３）の
動作に影響を及ぼす有効領域（８）まで、集積回路（１
）を覆い遮光するようになっている。尚、入射光による
光電変換とは、ｐｎ接合を形成させた半導体に、この半
導体に固有なある値以上のエネルギーを持った光が当た
ると、電子−正孔の対が形成され、接合まで到達した電
子や正孔は電界により振り分けられて光電流となるが、
この先→電気の変換をいう。The double-layer metal (2) is an effective area (8) where, if light is incident, it causes photoelectric conversion, which generates a photocurrent, and this photocurrent is carried by minority carriers, thereby affecting the operation of the transistor (3). ) up to integrated circuit (1
) to block light. Photoelectric conversion by incident light is when a semiconductor with a pn junction formed is hit by light with energy above a certain value unique to this semiconductor, electron-hole pairs are formed and reach the junction. The generated electrons and holes are distributed by the electric field and become photocurrent,
From here on → refers to the conversion of electricity.
さて、この半導体装置（１）は、一枚のＰ型基板（ウェ
ハ）（１）上に一度に多くの回路を作り込み、その後一
つ一つの集積回路（１）に分割カットする。つまりダイ
シングされることでつくられる。Now, in this semiconductor device (1), many circuits are fabricated at once on one P-type substrate (wafer) (1), and then the semiconductor device (1) is cut into individual integrated circuits (1). In other words, it is made by dicing.
このダイシング時に、半導体装置（１）の周辺部（５）
が二層メタル（例えばアルミニウム）（２１が覆われて
いないから、回転砥石にメタルが目づまりすることもな
く、又、分割カットが容易に正確になされる。During this dicing, the peripheral part (5) of the semiconductor device (1)
Since the two-layer metal (for example, aluminum) (21) is not covered, the rotating grindstone will not be clogged with metal, and division cuts can be easily and accurately made.
この分割カットされてつくられた半導体装置（１）の遮
光されていない周辺部（５）に、Ｐ型基板（１）とＮ型
エピタキシャル層（９）によってダミーホトダイオード
（１０）は形成されている。更に、これらＰ型基板（１
）とＮ型エピタキシャル層（９）は一層メタル（１１）
で短絡する構造となっている。又、ダミーホトダイオー
ド（１０）とトランジスタ（３）との光に感応する有効
領域の境界（８）は、両者の中央部で近似される。A dummy photodiode (10) is formed by a P-type substrate (1) and an N-type epitaxial layer (9) in the unshielded peripheral area (5) of the semiconductor device (1) produced by dividing and cutting. . Furthermore, these P-type substrates (1
) and the N-type epitaxial layer (9) is a single layer metal (11).
The structure is short-circuited. Furthermore, the boundary (8) of the effective area sensitive to light between the dummy photodiode (10) and the transistor (3) is approximated by the center of both.
ここで、半導体装置Ｎ）に光が照射されると、二層メタ
ル（２）で覆われているトランジスタ（３）と抵抗（４
）は遮光されており、この部分から光が入射することは
なく、光電変換は起きない。二層メタル（２Ｊで覆われ
ていないダミーホトダイオード色に光（６）が入射する
と、ここで光電変換が行われることによってＰ型基板（
１）からＮ層（９）へと光電流が流れる。しかし、Ｐ型
基板（１）とＮ層（９）との接合が一層メタル０υによ
って短絡されており、よって、ダミーホトダイオード（
１０）の隣にあるトランジスタ（３）は、その動作に光
照射による影響を受けることはない。Here, when the semiconductor device N) is irradiated with light, the transistor (3) covered with the two-layer metal (2) and the resistor (4) are exposed.
) is shielded from light, no light enters from this part, and no photoelectric conversion occurs. When light (6) enters the dummy photodiode color that is not covered with the double-layer metal (2J), photoelectric conversion is performed here and the P-type substrate (
A photocurrent flows from 1) to the N layer (9). However, the junction between the P-type substrate (1) and the N-layer (9) is short-circuited by a layer of metal 0υ, and therefore the dummy photodiode (
The operation of the transistor (3) next to the transistor (10) is not affected by the light irradiation.
又、周辺部（５）をダイシング等によってカットすると
、Ｐ型基板（１）とＮ型エピタキシャル層（９）とのＰ
Ｎ接合はダメージを受はリーク電流が発生するが、ＰＮ
接合が一層メタルで短絡され同電位となっていることか
ら回路動作上の不具合はない。Moreover, when the peripheral part (5) is cut by dicing etc., the P between the P type substrate (1) and the N type epitaxial layer (9) is removed.
The N junction is damaged and leakage current occurs, but the PN junction
Since the junctions are short-circuited with a layer of metal and have the same potential, there are no problems with circuit operation.
他の実施例は、その要部の構成断面を第２図に示すとお
り、ポンディングパッド（２）の五部にダミーホトダイ
オードＭを形成している半導体装置（１′）である。ポ
ンディングパッド周辺部（財）は、ワイヤボンディング
時にポンディングパッドを構成するメタル以外のメタル
とワイヤが短絡するのを防止するため、一層・二層メタ
ルで覆うことができない。この部分面に光（ωが入射す
ると、光電変換が行なわれ、Ｐ層（１′）からＮ層（印
へと光電流が流れても、本実施例ではｐ ｍ （１’）
からＮ層（印との接合が一層メタル（Ｉｎによって短絡
されているため、電流はここで短絡し他へ流れない。よ
って、この遮光がなされていない部分面の隣りにあるト
ランジスタ（群は、その動作に光照射による影響を受け
ることはない。Another embodiment is a semiconductor device (1') in which dummy photodiodes M are formed in five parts of a bonding pad (2), as shown in FIG. The area around the bonding pad cannot be covered with a single or double layer metal to prevent the wire from shorting with metal other than the metal that makes up the bonding pad during wire bonding. When light (ω) is incident on this partial surface, photoelectric conversion is performed, and even if a photocurrent flows from the P layer (1') to the N layer (marked), in this example, p m (1')
Since the junction between the N layer and the mark is short-circuited by a layer of metal (In), the current is short-circuited here and does not flow elsewhere. Its operation is not affected by light irradiation.
更に、上記以外の実施例は、その要部の構成断面を第３
図に示すとおり、基本素子（ここではトランジスタ（３
″））が二層メタルによる遮光がなされていない場合、
トランジスタ（３″）の隣りに、ダミ上ホトダイオード
Ｉ （１０” ’） 、Ｉｆ（１０”）を形成している
半導体装置（１″）である。ここで、光が入射すると、
光電変換が行なわれ、ＰＩ（１″）からＮ層（９” ）
へと光電流が流れても、ダミーホトダイオードＩ （１
０” ） 、ＩＴ（１０”）の各々の一層メタルＩ （
１１” ’） 、ＩＩ（１１″）によって電流は短絡し
、他へ流れない。Furthermore, in embodiments other than the above, the cross section of the main part is
As shown in the figure, the basic elements (here transistors (3
″)) is not shielded by double layer metal,
This is a semiconductor device (1'') in which a dummy photodiode I (10'') and If (10'') are formed next to a transistor (3''). Here, when light enters,
Photoelectric conversion is performed from PI (1″) to N layer (9″)
Even if the photocurrent flows to the dummy photodiode I (1
0”), IT (10”), each of the single layer metal I (
11'''), II (11''), the current is short-circuited and does not flow elsewhere.
よって、トランジスタ（３″）の動作において光照射に
よる影響を低減することができる。Therefore, the influence of light irradiation on the operation of the transistor (3'') can be reduced.
（ハ）発明の効果
この発明は、遮光性メタルが覆われず、光が入射し、光
電変換して光電流が生じるが、この光電流が発生するバ
イポーラ形半導体装置の部分に、ダミーホトダイオード
を形成し、このダミーホトダオードが発生した上記光電
流を短絡させることで、光電流が他の基本素子の動作に
影響を与えることを防ぐという効果を奏している。(c) Effects of the Invention This invention provides a dummy photodiode in the part of the bipolar semiconductor device where the light-shielding metal is not covered and light enters and undergoes photoelectric conversion to generate a photocurrent. By forming a dummy photodiode and short-circuiting the generated photocurrent, this dummy photodiode has the effect of preventing the photocurrent from affecting the operations of other basic elements.
第１図はこの発明に係る半導体装置の一実施例を示す要
部の構成説明図、第２図は他の実施例を示す要部の構成
説明図、第３図は更に他の実施例を示す要部の構成説明
図、第４図は従来の半導体装置を示すｖｃ８１１の構成
説明図である。
工・・・・・・半導体装置、
（１）・・・・・・Ｐ型基板（１層）、［２１・・・・
・・二面メタル、（３）・・・・・・トランジスタ、（
４）・・・・・・抵抗、（５）・・・・・・周辺部、（
６）・・・・・・光、（刀・・・・・・有効領域、（８
）・・・・・・有効領域の境界、（９）・・・・・・Ｎ
型エピタキシャルＩｉＭ （Ｎ層）、（ト））・・・・
・・ダミーホトダイオード、（１１）・・・・・・一層
メタル、面・・・・・・ポンディングパッド、
［１３＋・・・・・・ポンディングパッド周辺部。FIG. 1 is an explanatory diagram of the main part of a semiconductor device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of the main part of another embodiment, and FIG. 3 is an explanatory diagram of the main part of another embodiment. FIG. 4 is an explanatory diagram of the configuration of a vc811 showing a conventional semiconductor device. Engineering...Semiconductor device, (1)...P-type substrate (1 layer), [21...
...Two-sided metal, (3)...Transistor, (
4)...Resistance, (5)...Periphery, (
6) ... light, (sword ... effective area, (8
)...Boundary of effective area, (9)...N
Type epitaxial IiM (N layer), (g))...
...Dummy photodiode, (11)...More metal layer, surface...Ponding pad, [13+...Pounding pad periphery.
Claims (1)
装置において、 外部から光が入射しうる半導体基板部分に形成されＰＮ
接合する、前記半導体基板とは逆の導電型を有する半導
体層と、 前記ＰＮ接合する両半導体層を短絡する短絡手段と、を
備えたことを特徴とする半導体装置。[Claims] 1. In a semiconductor device in which a bipolar integrated circuit is formed on a semiconductor substrate, a PN is formed in a portion of the semiconductor substrate where light can enter from the outside.
A semiconductor device comprising: a semiconductor layer having a conductivity type opposite to that of the semiconductor substrate to be bonded to each other; and shorting means for shorting both semiconductor layers to be PN-junctioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59248352A JPS61127165A (en) | 1984-11-24 | 1984-11-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59248352A JPS61127165A (en) | 1984-11-24 | 1984-11-24 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61127165A true JPS61127165A (en) | 1986-06-14 |
| JPH0527990B2 JPH0527990B2 (en) | 1993-04-22 |
Family
ID=17176816
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59248352A Granted JPS61127165A (en) | 1984-11-24 | 1984-11-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61127165A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63164270A (en) * | 1986-12-26 | 1988-07-07 | Toshiba Corp | Laminated type solid-state image sensing device |
| CN109346496A (en) * | 2018-11-23 | 2019-02-15 | 德淮半导体有限公司 | Pixel unit, imaging sensor and its manufacturing method |
| JP2021097056A (en) * | 2019-12-13 | 2021-06-24 | コーデンシ株式会社 | Semiconductor integrated circuit device and optical sensor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51123083A (en) * | 1975-04-03 | 1976-10-27 | Ibm | Integrated semiconductor device |
| JPS5645086A (en) * | 1979-09-21 | 1981-04-24 | Hitachi Ltd | Photosensor |
-
1984
- 1984-11-24 JP JP59248352A patent/JPS61127165A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51123083A (en) * | 1975-04-03 | 1976-10-27 | Ibm | Integrated semiconductor device |
| JPS5645086A (en) * | 1979-09-21 | 1981-04-24 | Hitachi Ltd | Photosensor |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63164270A (en) * | 1986-12-26 | 1988-07-07 | Toshiba Corp | Laminated type solid-state image sensing device |
| CN109346496A (en) * | 2018-11-23 | 2019-02-15 | 德淮半导体有限公司 | Pixel unit, imaging sensor and its manufacturing method |
| JP2021097056A (en) * | 2019-12-13 | 2021-06-24 | コーデンシ株式会社 | Semiconductor integrated circuit device and optical sensor |
| JP2021097208A (en) * | 2019-12-13 | 2021-06-24 | コーデンシ株式会社 | Semiconductor integrated circuit device and optical sensor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0527990B2 (en) | 1993-04-22 |
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| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |