JPS61118072U - - Google Patents
Info
- Publication number
- JPS61118072U JPS61118072U JP192785U JP192785U JPS61118072U JP S61118072 U JPS61118072 U JP S61118072U JP 192785 U JP192785 U JP 192785U JP 192785 U JP192785 U JP 192785U JP S61118072 U JPS61118072 U JP S61118072U
- Authority
- JP
- Japan
- Prior art keywords
- display means
- resistor
- switch
- level
- displayed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
- Measurement Of Current Or Voltage (AREA)
Description
第１図はこの考案の一例の接続図、第２図〜第
４図はその説明のための図である。
７は表示手段である。
FIG. 1 is a connection diagram of an example of this invention, and FIGS. 2 to 4 are diagrams for explaining the same. 7 is a display means.
Claims (1)
第１の抵抗器を直列に接続し、第２の直流電圧の
電圧源と、上記表示手段との間に１回路１接点の
スイツチと、ダイオードと、第２の抵抗器との直
列回路を接続し、上記スイツチと上記ダイオード
との接続点を第３の抵抗器を通じてトランジスタ
のベースに接続し、このトランジスタのコレクタ
を第４の抵抗器を通じて上記表示手段に接続し、
上記トランジスタのエミツタを接地すると共に、
上記第１〜第４の抵抗器の値を選定して上記スイ
ツチがオフのときには上記第１の直流電圧のレベ
ルが上記表示手段により表示され、上記スイツチ
がオンのときには上記第２の直流電圧のレベルが
上記表示手段により表示されるようにした直流レ
ベルの表示回路。 A first resistor is connected in series between a first DC voltage source and the display means, and a switch with one circuit and one contact is connected between the second DC voltage source and the display means. , a series circuit of a diode, and a second resistor is connected, the connection point between the switch and the diode is connected to the base of a transistor through a third resistor, and the collector of this transistor is connected to a fourth resistor. connected to the display means through the device,
While grounding the emitter of the above transistor,
When the values of the first to fourth resistors are selected and the switch is off, the level of the first DC voltage is displayed by the display means, and when the switch is on, the level of the second DC voltage is displayed. A DC level display circuit in which the level is displayed by the above display means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP192785U JPH045019Y2 (en) | 1985-01-11 | 1985-01-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP192785U JPH045019Y2 (en) | 1985-01-11 | 1985-01-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61118072U true JPS61118072U (en) | 1986-07-25 |
| JPH045019Y2 JPH045019Y2 (en) | 1992-02-13 |
Family
ID=30475118
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP192785U Expired JPH045019Y2 (en) | 1985-01-11 | 1985-01-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH045019Y2 (en) |
-
1985
- 1985-01-11 JP JP192785U patent/JPH045019Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH045019Y2 (en) | 1992-02-13 |
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