JPS61111562A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS61111562A
JPS61111562A JP23476484A JP23476484A JPS61111562A JP S61111562 A JPS61111562 A JP S61111562A JP 23476484 A JP23476484 A JP 23476484A JP 23476484 A JP23476484 A JP 23476484A JP S61111562 A JPS61111562 A JP S61111562A
Authority
JP
Japan
Prior art keywords
conductive
polycrystalline
polycrystalline silicon
ion
ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23476484A
Other languages
Japanese (ja)
Inventor
Seiji Furubayashi
古林　誠治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP23476484A priority Critical patent/JPS61111562A/en
Publication of JPS61111562A publication Critical patent/JPS61111562A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To make the part of polycrystalline Si conductor non-conductive without dispersing melt splashes, by using ion implantation to make polycrystalline Si non-conductive. CONSTITUTION:Oxygen ions 7 are generated with an ion source 6. Only the oxygen ions 7 are selected by a mass analysis system 8, and ion beams 7a are obtained by acceleration with an acceleration system 9. These beams are converged by a convergence system 10 and directed to a required point of a semiconductor substrate 5 in an implantation chamber 13 by means of a beam positioner and scanning system 11 interlocking with a computer 12; then, ion implantation is carried out under scanning. Thus, the polycrystalline Si on the semiconductor substrate 5 can be made non-conductive by forming an oxide at a desired point. This method can be applied to form element-isolating layers by changing polycrystalline Si layers into insulators besides making polycrystalline Si wirings non-conductive. Moreover, any ions as well as oxygen, such as nitrogen, which form an insulator by reaction with silicon, can be used.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体装置の製造方法に係シ、史に詳述すれ
ば、ある回路構成の半導体集積回路装置を形成しておい
て、その表面の所要導体部分を非導通化させることによ
って特定の機能を発揮するものを得るという方式が広く
採用されつつあるが、この発明はこの半導体表面の多結
晶シリコン導体部分を非導通化する方法の改良に関する
ものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device. The method of obtaining a device that exhibits a specific function by making the required conductor portion of a semiconductor non-conductive is becoming widely adopted, but this invention aims to improve the method of making the polycrystalline silicon conductor portion of the semiconductor surface non-conductive. It is related to.

〔従来の技術〕[Conventional technology]

第２図は従来のレーザビームを使用する方式の具体例を
示す構成図で、［１１は光源、（２）は光学系、（３）
は測定系、（４）はビームポジショナ−３（５）は半導
体基板である。Figure 2 is a configuration diagram showing a specific example of a conventional method using a laser beam, [11 is a light source, (2) is an optical system, (3)
3 is a measurement system, (4) is a beam positioner, and (5) is a semiconductor substrate.

光源（１１で発生したレーザ光は光学系（２）で適切な
エネルギーに調整され、測定系（３）でそのエネルギー
を測定して、ビームポジショナ−（４）によってビーム
位置を規定して半導体基板＋５１に照射して、その表面
に形成されている多結晶シリコン導体を所望位置で切断
する。The laser beam generated by the light source (11) is adjusted to an appropriate energy by the optical system (2), the energy is measured by the measurement system (3), and the beam position is determined by the beam positioner (4) and the laser beam is applied to the semiconductor substrate. +51 irradiation to cut the polycrystalline silicon conductor formed on the surface at a desired position.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の方法では多結晶シリコン導体部分の上にレーザビ
ームを照射して溶融切断させるので、切断時に溶融した
多結晶シリコンの飛沫が発生し、周辺の配Ｉｖ１８１を
短絡したり、パターンに損傷を与えるなどの問題点があ
った。In the conventional method, a laser beam is irradiated onto the polycrystalline silicon conductor part to melt and cut it, so splashes of melted polycrystalline silicon are generated during cutting, which short-circuits the surrounding wiring Iv181 and damages the pattern. There were problems such as.

この発Ｅ！Ａは以上のような問題点を解決するためにな
され次もので、多結晶シリコンの飛沫を発生するような
レーザビーム照射を用いずに、多結晶シリコン導体部分
の非導通化を行う方法を提供するものである。This release E! A was created to solve the above problems, and provides a method for making polycrystalline silicon conductor parts non-conductive without using laser beam irradiation that would generate polycrystalline silicon droplets. It is something to do.

〔問題点を解決する之めの手段〕[Means for solving problems]

この発明に係る半導体装置の製造方法では、多結晶シリ
コン導体の所望位置にシリコンと反応して絶縁物を生成
する物質のイオンビームを照射するものである。In the method for manufacturing a semiconductor device according to the present invention, a desired position of a polycrystalline silicon conductor is irradiated with an ion beam of a substance that reacts with silicon to produce an insulator.

〔作用〕 この発明では多結晶シリコン導体の所望部分に上記イオ
ンを注入することによって、当該部分に電気抵抗の高い
物質が形成され、多結晶シリコン４体が非導通になる。[Function] In the present invention, by implanting the ions into a desired portion of a polycrystalline silicon conductor, a substance with high electrical resistance is formed in the portion, and the four polycrystalline silicon bodies become non-conductive.

〔実施例〕〔Example〕

第１図はこの発明の一実細例を具体的に実施する場合の
構成図で、（６）はイオン（７）を出すイオン源、（８
）は質量分析系、（９）はイオン（７）全加速してイオ
ンビーム（７ａ）を得る加速系、（ｌＯ）はイオンビー
ム（７ａ）の集束系、（６）はビームポジショナ−及び
走査系、（２）は計算機、□はイオンε入室である。FIG. 1 is a block diagram of a concrete example of the present invention, in which (6) is an ion source that emits ions (7);
) is a mass spectrometry system, (9) is an acceleration system that fully accelerates ions (7) to obtain an ion beam (7a), (lO) is a focusing system for the ion beam (7a), and (6) is a beam positioner and scanning system. system, (2) is a computer, and □ is an ion ε entering the room.

例えば、イオン源（６）で酸素イオ７　ｆ７）　’に発
生し、質量分析系（８）で設素イオン（７）のみを選択
し、加速系（９）で加速してイオンビーム（７ａ）を得
て、これを集束系（ｌＯ）で集束し、計算機＠と連動し
ているビームポジショナ−及び走査系（６）によって注
入室は４内の半導体基板（６）の所要個所にイオンビー
ムを指向させ、走査してイオン注入を行う。このように
して半導体基板（５）上の多結晶シリコンの所望個所に
酸化物を形成し非導通化することができる。For example, the ion source (6) generates oxygen ions (7f7)', the mass spectrometry system (8) selects only the elemental ions (7), and the acceleration system (9) accelerates them to form the ion beam (7a). The ion beam is focused by the focusing system (lO), and the ion beam is directed to the desired location on the semiconductor substrate (6) in the implantation chamber by the beam positioner and scanning system (6) linked to the computer @. Ion implantation is performed by pointing and scanning. In this way, it is possible to form an oxide at a desired location on the polycrystalline silicon on the semiconductor substrate (5) and make it non-conductive.

この発明の方法は多結晶シリコン配線の非導通化の他に
、多結晶シリコ／層を絶縁物化することによって素子間
分離層の形成にも利用できる。また、イオンは酸素の他
に窒素などシリコンと反応して絶縁物を形成するイオン
であれば何を用いてもよい。The method of the present invention can be used not only to make polycrystalline silicon wiring non-conductive, but also to form an isolation layer between elements by making the polycrystalline silicon layer an insulator. In addition to oxygen, any ions such as nitrogen that react with silicon to form an insulator may be used as the ions.

６発例の効果〕 以上説明したように、この発明では多結晶シリコンの非
導通化にイオン注入を用い友ので、従来のような溶融飛
沫の飛散がなく周辺への損傷のおそれがない。Effects of 6 Examples] As explained above, in the present invention, since ion implantation is used to make polycrystalline silicon non-conductive, there is no scattering of molten droplets as in the conventional case, and there is no risk of damage to the surrounding area.

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの発明の一実捲例を具体的に実施する場倚の
構成図、第２図は従来のレーザビームを使用する方式の
具体例を示す構成図である。 図において、（５）は半導体基板、（７ａ）はイオンビ
ームである。 なお、各図中同一符号は同一または相当部分を示す。FIG. 1 is a block diagram showing a concrete implementation of an example of the present invention, and FIG. 2 is a block diagram showing a concrete example of a conventional method using a laser beam. In the figure, (5) is a semiconductor substrate, and (7a) is an ion beam. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (4)

【特許請求の範囲】[Claims] （１）半導体基板表面に形成された多結晶シリコン層に
、シリコンと反応して絶縁物を生成させるべき物質のイ
オンビームを照射して、当該部分の上記多結晶シリコン
層を非導通化させる工程を備えた半導体装置の製造方法
。(1) A step in which the polycrystalline silicon layer formed on the surface of the semiconductor substrate is irradiated with an ion beam of a substance that is to react with silicon to produce an insulator, thereby rendering the polycrystalline silicon layer in the relevant portion non-conductive. A method for manufacturing a semiconductor device comprising: （２）多結晶シリコン層が多結晶シリコン配線であるこ
とを特徴とする特許請求の範囲第１項記載の半導体装置
の製造方法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the polycrystalline silicon layer is a polycrystalline silicon wiring. （３）イオンビームに酸素イオンビームを用いることを
特徴とする特許請求の範囲第１項または第２項記載の半
導体装置の製造方法。(3) A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that an oxygen ion beam is used as the ion beam. （４）イオンビームに窒素イオンビームを用いることを
特徴とする特許請求の範囲第１項または第２項記載の半
導体装置の製造方法。(4) A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that a nitrogen ion beam is used as the ion beam.
JP23476484A 1984-11-05 1984-11-05 Manufacture of semiconductor device Pending JPS61111562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23476484A JPS61111562A (en) 1984-11-05 1984-11-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23476484A JPS61111562A (en) 1984-11-05 1984-11-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS61111562A true JPS61111562A (en) 1986-05-29

Family

ID=16975987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23476484A Pending JPS61111562A (en) 1984-11-05 1984-11-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS61111562A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0442718A2 (en) * 1990-02-14 1991-08-21 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0442718A2 (en) * 1990-02-14 1991-08-21 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device

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