JPS61111558A - Semiconductor device - Google Patents

Abstract

PURPOSE:To offer the title device including a bi-polar transistor with no flow of leakage current to the power source or the ground in saturated action, by a method wherein an isolation region of reverse conductivity type is connected to the collector via resistors. CONSTITUTION:One end of a resistor 23 is connected to the collector of a PNP transistor 20, and the other end to the isolation region of reverse conductivity type. This prevents flows of leakage current to the power source or the ground in saturated action. When the power source 30 is connected to the emitter 10 of the transistor 20, and a load resistor 32 to the collector 12, thus increasing the drive current I31 of the base 11 with a constant current source 31, then the collector current IC20 can not increase because of the saturation of the PNP transistor 20 in IB1. Further, on increase in drive current, a parasitic NPN transistor 21 sets in action, and the collector current IC21 flows through the resistor 23 from the collector of the transistor 20 but gives no effects in a circuit manner.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a semiconductor device, and particularly to a semiconductor device having a conductivity type of a PNPNPS layer, such as a vertical PNP transistor.

(Prior art) Conventionally, in semiconductor integrated circuits, complementary bipolar
Transistors are often used.

In order to realize complementary bipolar transistors on the same semiconductor substrate, an NPN transistor is constructed by using the NFI IC 1'7 region formed on a P-type substrate as a collector, and further forming a P-type base and an N-type emitter. can,
On the other hand, the vertical PNP) transistor is as shown in Figure 4.
After forming an N-type epitaxial region 2 on a P-type substrate 1 and embedding a KP-type collector 3, an N-type epitaxial layer 4 is formed.
and 16 as an isolation region and a base, respectively, further KP type isolation diffusion region 5 and collector electrode number 9
A protrusion 17 is formed, and a base electrode region protrusion 7 and a P-type emitter 6 are formed in the base 16.

In the above structure, PNP)? The transistor has a PNPNP five-layer structure including an emitter, base, and collector PNP regions, an NW isolation region, and a P-type substrate. Usually, the NW isolation region is floating or biased to a high potential.

(Problems to be Solved by the Invention) A problem with the conventional bipolar transistor having a five-layer structure is that when the transistor operates in the saturation region, a parasitic transistor operates and leakage current flows. Conventional problems will be explained with reference to FIGS. 4 to 6.

5 is an equivalent circuit diagram of the vertical PNP transistor shown in FIG.
P) It is an equivalent circuit diagram when the isolation region of the transistor is set to 70-ting and the transistor is operated in saturation.

N-type aisle region 2 of vertical PNP transistor,
4 to a high potential, PNP transistor 2
When 0 is saturated, a parasitic NPN transistor 14 is formed, which uses the N-type isolation regions 2 and 4 as collectors, uses the collector 3 and collector electrode number projection part 17 of the PNP transistor as a base, and uses the base 16 of the PNP transistor as an emitter. It operates, and current flows from the bias power supply.

Next, when the N-type isolation region is set to 70-Ting, the parasitic NPN transistor 21 operates as shown in FIG. There is a problem in that the parasitic PNP (PNP) transistor 22 whose emitters are the collector 3 and the collector electrode lead-out portion 17 of the PNPI transistor operate simultaneously, and leakage current flows to the ground power supply via the P-type substrate 1'. Ta.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device including a bypass transistor in which no leakage current flows to the power supply or ground during saturation operation.

(Means for Solving the Problems) A semiconductor device of the present invention includes: - an opposite conductivity type isolation region formed on a conductivity type semiconductor substrate; - a conductive hidden collector region embedded in the isolation region; The collector region and the collector electrode jhl formed in the J milk shape>
In a bipolar transistor comprising a base region of opposite conductivity type separated from the isolation region by a lead-out region and an emitter region of one conductivity type formed on the surface of the base region, the isolation region of opposite conductivity type is connected to the isolation region through a resistor. Configured by connecting to a collector.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is an equivalent circuit diagram when an embodiment of the present invention is operated in saturation.

As shown in FIG. 1, one end of the resistor 23 is connected to the collector of the transistor 20 (in this embodiment, PNP), and the other end of the resistor 23 is connected to the opposite conductivity type isolation region (region 2 in FIG. 4).
．． (equivalent to 4). In this way, by additionally connecting all the resistors 23, no leakage current flows to the power supply or ground during saturation operation. This will be explained with full reference to FIGS. 1 and 3.

PNP ); Power supply 30 to emitter 10 of 7 transistors 20
, and a load resistor 32 is connected to the collector 12. When driving with a constant current source 31, as shown in FIG. is saturated, and the collector current I C (20) cannot be increased. When the drive current is further increased, the IF generation NPN transistor 21 operates and the collector current Ic (zt) becomes P.
This current flows from the collector of the NP transistor 20 through the entire resistor 23, but has no effect on the circuit.If the drive current is further increased, when the parasitic transistor 22 operates at IB2, the collector current I
C(22) becomes a leakage current to ground. These currents are expressed by the following equation.

! c(zx)21<31)-IBl...(
2) Ic<zz>: β(22) X (IC(21)
-In2) = (4) where, IBl: Drive current at which the parasitic NPN transistor starts operating In2: Drive current at which the parasitic PNP transistor starts operating c: Collector current β: Current amplification factor Vcsat: Collector saturation voltage It is.

In the present invention, in order to obtain a predetermined effect, it is necessary to select the value (23) of the resistor 23 so that In2 is larger than the maximum drive current.

Next, as shown in FIG. 2, when the collector is grounded, the parasitic transistor 21 operates in the opposite direction and P
NP) constitutes a thyristor circuit with the transistor 20, but since the emitter current of the parasitic transistor 21 is limited by the resistor 23, it does not turn on.

The second effect of this embodiment occurs because the isolation region is not biased with a power supply. That is, as shown in FIG. 5, when the isolation region is connected to a power source to bias it at a high potential, a voltage is applied between the isolation region 2 and the collector 3. Generally, the isolation region 2 and the collector 3 form an N-P junction with a high purity concentration, so the breakdown voltage cannot be increased. Since the bias voltage must be higher than at least the potential of the emitter 1o, the collector-emitter voltage of the PNP transistor is limited to below the breakdown voltage. Furthermore, since the N-P junction has a large junction capacitance, a large capacitance is connected between the power supply and the collector.
The characteristics at high speed operation are deteriorated. In this embodiment, since the isolation region follows the collector potential, the collector-emitter breakdown voltage and high-speed operation performance are improved.

(Effects of the Invention) As described above, according to the present invention, a semiconductor device including a bipolar transistor in which no leakage current flows to the power supply or ground during saturated operation can be obtained.

[Brief explanation of drawings]

Fig. 1 is an equivalent circuit diagram of an embodiment of the present invention when operating in saturation, Fig. 2 is an equivalent circuit diagram of an embodiment of the invention when operating in non-saturation, and Fig. 3 is the equivalent circuit diagram of Fig. 1. The collector current and parasitic N when the drive current is increased in the equivalent circuit of
Characteristic diagrams showing the collector current of a PN transistor and the collector current of a parasitic PNP transistor, FIG. 4 is a cross-sectional view of an example of a conventional vertical PNP transistor, and FIG.
The equivalent circuit diagram when the isolation region of the vertical PNP transistor shown in Fig. 4 is biased to the highest potential and operated in saturation. FIG. 3 is an equivalent circuit diagram when the device is operated. 1... Pal-based IE, 2... Old N-type isolation region, 3... Pi collector, 4...
...Nfi isolation area, 5...Pf
i separation diffusion region, 6...P type emitter, 7...
...-N reduced base contact area, 8...insulating film, 9...contact window, 1o...
Emitter electrode, 11, old...Base electrode, 12...
...Collector electrode, 13...P substrate electrode, 14
...Nfi isolation run electrode, 15...
...N-type isolation covered contact area, 16...
...N[Base, 17...Collector electrode area projection part, 20...PNP transistor, 21
... Parasitic NPN transistor, 22 ... Parasitic PNP) transistor, 23 ... Resistor, 30.
...Power supply, 31 ... Constant current drive power supply, 32 ... Load resistance, 33 ... Bias current. Agent: Susumu Uchihara, Patent Attorney, I"',,"'
-,,>Pa・1. -2 3rd Calculation 4 Seedling $ Z Σ

Claims (1)

[Claims] An opposite conductivity type isolation region formed on a semiconductor substrate of one conductivity type, a one conductivity type collector region embedded in the isolation region, and the isolation region formed by the collector region and a collector electrode extraction region formed in an annular shape. A bipolar transistor comprising a base region of an opposite conductivity type separated from the base region and an emitter region of one conductivity type formed on the surface of the base region, characterized in that the isolation region of the opposite conductivity type is connected to the collector via a resistor. semiconductor devices.