JPS61110445A - Dielectric isolation silicon substrate and manufacture thereof - Google Patents

Abstract

PURPOSE:To inexpensively and rapidly manufacture by composing a substrate by sintering or fusing fine Si particles or of a sintered fused material. CONSTITUTION:After grooves 16 are formed on a single crystal Si wafer 1, the wafer 1 is washed with water to remove the resist surface on the upper surface, the wafer 1 is then filled in a furnace 20, steam is fed while heating to thermally oxidize the upper surfaces of the grooves 1b and the device forming portion 1a of the wafer 1, thereby forming an SiO2 layer 11. Ultrafine Si power particles are placed in the prescribed thickness on the surfaces 1a, 1b of the wafer 1. It is placed on a refractory plate 22 in this state, filled in a heating furnace 21, the temperature is raised to sinter the ultrafine Si particles accumu lated on the wafer 1, thereby manufacturing a preform 23 of a dielectric isola tion silicon substrate. With the bottom 12 of the wafer 1 of the preform 23 as a reference surface the upper surface 13 of the single crystal silicon substrate reinforcing support layer 3 is formed in parallel with the bottom of the wafer 1 by mirror-polishing.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a dielectrically isolated silicon substrate on which a plurality of silicon devices with high breakdown voltage and excellent radiation resistance characteristics are formed, and a method for manufacturing the same. As shown in FIG. 2, in the tltl split silicon substrate, a single crystal silicon region 1 on which elements such as transistors are fabricated is separated from the sides, bottom, and surface by an Mm body layer 2 such as a silicon dioxide film, and is electrically isolated from the surroundings. The so-called silicon island 1
&, and is configured so that elements with high breakdown voltage and excellent radiation resistance characteristics can be integrated within region l.

The properties required of such a dielectrically isolated silicon substrate are: (1) The silicon island 1a on which elements are integrated usually has a thickness of 50 mm.
Since the thickness is less than μm, a layer 3 that reinforces and supports the single crystal silicon layer via a dielectric film is provided.

(2) This reinforcing support layer 3 should not contaminate single crystal silicon in the process of forming a device (this is not allowed even if the reinforcing support layer 3 has deposits that cannot be removed by washing, etc.).

■ Single crystal silicon island 1a failed during the device manufacturing process.
No significant warping occurs due to non-uniformity in the coefficient of thermal expansion between the reinforcing support layer 3 and the reinforcing support layer 3.

■ The reinforcing support layer 3 can withstand the temperature rise (
It is thermally and chemically stable without causing deformation, melting, decomposition, diffusion, etc. at temperatures (about 30° C.).

As long as the above conditions are satisfied, monosilane gas is introduced into the furnace, burned in the furnace, and polycrystalline silicon is deposited by a gas phase reaction on the electrically-proof separation film of the single crystal substrate placed in the furnace. Growth method (Chemical Va.
por Deposition.

The rCVD method (hereinafter referred to as "rCVD method") is being carried out.

<Problems to be solved by the invention> When manufacturing the dielectric-separated silicon substrate 1 having the above-described structure, the number of single crystal plates that can be installed in a heating furnace is relatively small in the CVD method. Since the deposition rate of polycrystalline silicon (hereinafter referred to as rslJ) by the CVD method is slow (it is also necessary to control the deposition rate to reduce the anti-pt due to deposition), the thickness of the polycrystalline silicon (hereinafter referred to as rslJ) is about 0.4 mm. It takes about 10 hours. In other words, the above-mentioned conventional method requires a small amount of processing per time, requires expensive equipment to be used for a long time, and consumes a large amount of power. The disadvantage was that the layer formation cost was high. Further, there is also a problem in that peripheral bulges and dot-like deposits adhere to the surface of the single crystal silicon substrate on the side opposite to the side on which the reinforcing support layer is deposited due to warpage of the substrate during deposition.

The present invention has been made to eliminate the drawbacks of the conventional dielectrically isolated St substrates mentioned above.

This article attempts to provide a dielectric-separated 3i substrate having a structure that allows the rapid production of a single-crystal 81 substrate reinforcing support and a method for manufacturing the same.

Technical Means for Solving All Problems> To achieve the above object, the dielectrically isolated Si substrate of the present invention includes a single crystal silicon substrate and a single crystal silicon substrate formed on the upper surface side of the single crystal silicon substrate and partitioned by a separation groove. a device formation area;
a silicon dioxide dielectric isolation layer formed between the device formation region and the isolation trench surface on a single-crystal silicon substrate;
In a dielectric-separated silicon substrate consisting of a silicon dioxide dielectric separation layer and a single-crystal silicon substrate reinforcing support layer, the single-crystal silicon substrate reinforcing support layer is formed of a sintered body of silicon particles, a molten body, or both of these. It is characterized by being composed of one of these.

The method for manufacturing the dielectric isolation 3i substrate described above includes a first step of forming a separation groove between each device formation region by anisotropic etching on the device formation region formation side surface of the single crystal silicon substrate; A second step of forming a silicon dioxide dielectric film on the upper surface of the device formation region and isolation trench formation side on the substrate, and after the second step is completed.

The third step is to sinter or melt silicon powder on the silicon dioxide dielectric film and form it on the single-crystal silicon substrate reinforcing support layer.
The upper surface of the single-crystal silicon substrate reinforcing support layer and the surface of the single-crystal silicon substrate on the side opposite to the device-forming region are polished to a golden mirror finish to form mutually isolated device-forming regions on the single-crystal silicon substrate reinforcing support layer. and a fourth step of forming a silicon island.

Function> Since the dielectric separation 81 substrate of the present invention is composed of a sintered body, a melted body, or both of the single-crystal Sl substrate reinforcing support layer TSI fine particles, the above-mentioned necessity of the dielectric separation substrate is satisfied. The conditions are: ■ Reinforcement and support of 81 layers of single crystal, ■ St
(1) There is no warping due to the difference in thermal expansion coefficient because it is made of the same St material as the single-crystal St substrate; (2) It is thermally and chemically stable (after sintering is completely stable at about 1100°C).

Sl powder is produced by pulverizing relatively inexpensive polycrystalline S1, which is the raw material for this powder, rather than expensive single-crystalline Sl.
Since a Si sintered body layer having a diameter of approximately 0.05 μm can be obtained easily and inexpensively, a Si sintered body layer can be easily formed.

As is generally known as a characteristic of fine powder, the melting point (sintering temperature) of fine powder is lower than the melting point of the bulk.
The bulk Sl of the St powder with a particle size of about 0.05 μm is 14
Although its melting point is 00°C, it fully melts at 1200°C. Further, the melting and sintering using these fine particles can be performed even if the holding time is 1 minute at 1200°C.

The furnace used for this sintering must be able to create a vacuum or inert atmosphere, but unlike CVD furnaces, which require large spacing between substrates to ensure uniform deposition, only uniform heating conditions are required. Since this requires a large number of substrates, a large number of substrates can be placed in the furnace.

For sintering, in addition to using only ultrafine silicon particles with a uniform particle size, it is also possible to use a mixture of coarse particles and ultrafine particles with significantly different particle sizes, or a mixture of several types of particle sizes. It is possible. Furthermore, in the case of using these mixtures, it is possible not only to maintain a uniform mixing ratio over the thickness, but also to change the mixing ratio of one particle size in a layered manner.

Furthermore, as shown in FIG. 1, if the dielectric separation substrate is left with the support layer 3 formed thereon, it cannot be shaped into a shape that can be used in the device manufacturing process as shown in FIG. That is, the upper and lower surfaces of the product in the state shown in FIG.
It is necessary to finish the single crystal 12 and t into parallel planes with high precision, and to make the depth of the Si islands 1a uniform to about several μm. This series of processing is normally performed using the single crystal side 12 as the first reference plane.

In this case, it is necessary to perform the peripheral heaping 4 and dotted deposits 5 without impairing the flatness of the surface 12.

Since the dielectric-separated St substrate according to the present invention is produced by the above-described manufacturing method, it is not attached to the surface 12 side, which is advantageous in terms of reducing the number of processing steps and increasing precision.

<Implementation sequence> The entire manufacturing process of an embodiment of the method for manufacturing a dielectrically isolated silicon substrate of the present invention will be explained below.
A single crystal wafer with the (100) plane as the upper and lower principal surfaces is fabricated.

O The side surface, bottom surface and (100) top surface portion of the obtained single crystal wafer 1 where all devices are to be formed 1a% la, l
The upper surfaces of a, la, la, and la are each coated with a resist film 16 of polymethyl methacrylate (hereinafter referred to as rPMMAJ) at regular intervals, as shown in FIG. 3(a).

θ When the single crystal wafer 1 coated with the resist film 16 is immersed in the KOH solution as shown in FIG. Etched from V
A letter-shaped groove tb is formed.

■ After the groove 16 is formed in the single crystal Si sea urchin/%-1,
After washing the single crystal Si wafer 1 with water and removing the upper resist surface, the single crystal wafer 1 is placed in a furnace 20 while being heated to 1100°C, as shown in FIG. 3 (cl).
Water vapor is introduced from one end of the single crystal Si wafer 1 to completely oxidize the groove 1b and the top surface of the device forming portion 1a, and the S
10t layer 11t - formed.

■ 1a and 1b of the single crystal Ueno-1 obtained in this way are divided into ultrafine particles Stt powder to a predetermined thickness (Fig. 3f).
As shown in dl, the single crystal Si wafer 1 is
Place it on the heat-resistant plate 22, put it into the heating furnace 21, and! The internal temperature was raised to 1,200° C., and the St fine particles deposited on the wafer 1 were sintered to form a base material 23 of a dielectrically isolated silicon substrate having the same structure as shown in FIG. Create.

■ The bottom surface 12 of the single-crystal 3i wafer 1 of the base material 23 of the obtained dielectric-separated silicon substrate has a lot of peripheral protuberances 4 and dot-like deposits 5 attached to it, so the bottom surface 12t is used as the reference surface for the single crystal. Silicon substrate reinforcement support/! 13 top surface 13t
'.

The wafer 1 is mirror-polished so as to form a plane parallel to the bottom surface, and Si islands 1a and 1a are formed at regular intervals as shown in FIG.
La, la, la, la, la were formed, and it was possible to manufacture a silicon substrate with electrical isolation.

Since the dielectric-separated Si substrate produced in the above example is composed of a sintered body of 1 particle of the reinforcing support layer 1jts of a single crystal 81 substrate, compared to the conventional method of depositing St 2 by CVD method, The deposition time can be completed in about V5, and the power consumption and operation time of personnel and equipment can be significantly reduced, so that the production cost can be significantly reduced.

Note that 8 of the reinforcing support layer of the single crystal Si substrate in the above example
Although No. 1 shows an example constructed of a sintered body, it may be constructed of a molten body or both a sintered body and a molten body.

<Effects of the Invention> As is clear from the above description, the dielectric-separated S5 substrate according to the present invention is composed of Stt particles sintered, melted, or sintered molten, so that it has no difference with the single crystal 81 substrate. Good compatibility,
In addition, it has the advantage of being inexpensive and being able to be manufactured quickly.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view showing the structure of a conventional dielectrically isolated Si substrate base material, and Fig. 2 shows the structure of a conventional dielectrically isolated Sl substrate fabricated from the dielectric valve 1'faSi substrate of Fig. 1. Cross-sectional views, Figures 3 fal to (fl are explanatory diagrams showing the manufacturing process of the dielectric isolation S1 substrate according to the present invention K. ■ Surface Middle, 1. Single crystal St substrate. la.. Si island. lb, 11...Groove, 2...Stow layer, 3...Single crystal St-based reinforcing support layer, 16...Resist film

Claims (2)

[Claims] (1) A single-crystal silicon substrate, a device formation region formed on the upper surface side of the single-crystal silicon substrate and partitioned by a separation trench, and a device formation region formed between the device formation region and the separation trench surface on the single-crystal silicon substrate. In a dielectric-separated silicon substrate consisting of a silicon dioxide dielectric separation layer and a single-crystal silicon substrate reinforcing support layer formed on the silicon dioxide dielectric separation layer, the single-crystal silicon substrate reinforcing support layer is sintered with silicon particles. A dielectrically isolated silicon substrate characterized by being composed of a solid, a molten material, or one of both. (2) A first step of forming a separation trench between each device formation region by anisotropic etching on the device formation region formation side surface of the single crystal silicon substrate, and a first step of forming a separation groove between the device formation regions and the separation groove on the single crystal silicon substrate. A second step of forming a silicon dioxide dielectric film on the upper surface of the formation side, and after the second step, sintering or melting silicon powder on the silicon dioxide dielectric film to form a single crystal silicon substrate reinforcing support layer. A third step of forming the monocrystalline silicon substrate reinforcing support layer and mirror-polishing the upper surface of the single crystal silicon substrate reinforcing support layer and the surface of the single crystal silicon substrate opposite to the device formation region to isolate each other from each other on the single crystal silicon substrate reinforcing support layer. a fourth step of forming a silicon island in a device formation region.