JPS61107229U - - Google Patents
Info
- Publication number
- JPS61107229U JPS61107229U JP19254984U JP19254984U JPS61107229U JP S61107229 U JPS61107229 U JP S61107229U JP 19254984 U JP19254984 U JP 19254984U JP 19254984 U JP19254984 U JP 19254984U JP S61107229 U JPS61107229 U JP S61107229U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- subtracting
- adding twice
- amplifier circuit
- output level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図ないし第５図は局部発振周波数とアンテナ
周波数の関係を示すグラフ、第６図は従来例のブ
ロツク図である。
１……フロントエンド、２……ＩＦ増幅器、３
……選局回路、４……メモリ、５……レベル検出
回路、６……表示回路。
FIG. 1 is a block diagram showing an embodiment of the present invention.
2 to 5 are graphs showing the relationship between local oscillation frequency and antenna frequency, and FIG. 6 is a block diagram of a conventional example. 1...Front end, 2...IF amplifier, 3
...Tuning selection circuit, 4...Memory, 5...Level detection circuit, 6...Display circuit.
Claims (1)
ド内の局部発振部を規定の周波数で発振させ、ア
ンテナ周波数と混合するスーパヘテロダイン方式
の受信機において、ＩＦ増幅回路の出力レベルを
検出する手段と、そのレベルをメモリする手段と
、局部発振周波数に２倍のＩＦ周波数を加算後、
４倍のＩＦ周波数を減算し、更に２倍のＩＦ周波
数を加算する手段と、局部発振周波数に２倍のＩ
Ｆ周波数を加算した後の値と、４倍のＩＦ周波数
を減算した後の値とをＩＦ増幅回路出力レベルか
ら得て比較する手段と、その比較結果よりイメー
ジ周波数による受信であるか否かの判定を行なう
手段とを具備したことを特徴とする選局装置。 A means for detecting the output level of an IF amplifier circuit in a superheterodyne receiver in which a local oscillator in a front end oscillates at a specified frequency based on a data signal from a memory and mixes it with an antenna frequency. After adding twice the IF frequency to the local oscillation frequency,
Means for subtracting 4 times the IF frequency and further adding twice the IF frequency, and adding twice the IF frequency to the local oscillation frequency.
Means for obtaining and comparing the value after adding the F frequency and the value after subtracting 4 times the IF frequency from the IF amplifier circuit output level, and determining from the comparison result whether reception is based on the image frequency or not. A channel selection device comprising means for making a determination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19254984U JPS61107229U (en) | 1984-12-18 | 1984-12-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19254984U JPS61107229U (en) | 1984-12-18 | 1984-12-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61107229U true JPS61107229U (en) | 1986-07-08 |
Family
ID=30749959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19254984U Pending JPS61107229U (en) | 1984-12-18 | 1984-12-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61107229U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7509106B2 (en) | 2004-04-06 | 2009-03-24 | Sony Corporation | Test signal generation circuit, and reception circuit |
-
1984
- 1984-12-18 JP JP19254984U patent/JPS61107229U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7509106B2 (en) | 2004-04-06 | 2009-03-24 | Sony Corporation | Test signal generation circuit, and reception circuit |
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