JPS6098707A - Fm detection circuit - Google Patents

Fm detection circuit

Info

Publication number
JPS6098707A
JPS6098707A JP20712083A JP20712083A JPS6098707A JP S6098707 A JPS6098707 A JP S6098707A JP 20712083 A JP20712083 A JP 20712083A JP 20712083 A JP20712083 A JP 20712083A JP S6098707 A JPS6098707 A JP S6098707A
Authority
JP
Japan
Prior art keywords
circuit
signal
controlled oscillator
voltage controlled
distortion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20712083A
Other languages
Japanese (ja)
Inventor
Yoshinori Kameyama
亀山 義典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP20712083A priority Critical patent/JPS6098707A/en
Publication of JPS6098707A publication Critical patent/JPS6098707A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/001Details of arrangements applicable to more than one type of frequency demodulator
    • H03D3/003Arrangements for reducing frequency deviation, e.g. by negative frequency feedback
    • H03D3/004Arrangements for reducing frequency deviation, e.g. by negative frequency feedback wherein the demodulated signal is used for controlling an oscillator, e.g. the local oscillator

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To decrease distortion and to improve the threshold value by detecting an oscillation signal generated by a voltage controlled oscillator of a PLL circuit. CONSTITUTION:The titled FM detection circuit does not use a demodulation signal at a terminal 4b including distortion due to the nonlinearity of the voltage controlled oscillator 7 of the PLL circuit 4 but uses an oscillation signal of the voltage controlled oscillator 7. Since the oscillation signal is synchronized with an FM signal and phase noise is decreased, the distortion of the demodulation signal detected by a pulse count detector 16 is decrease and the threshold value is improved.

Description

【発明の詳細な説明】 本発明はFM検波回路に係わシ、特に歪の低減と信号対
雑音比が急激に悪下する受信信号レベルのスレショール
ドの改善を計ったFM検波回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM detection circuit, and more particularly to an FM detection circuit that reduces distortion and improves the threshold of the received signal level at which the signal-to-noise ratio rapidly deteriorates.

一般に、FM検波回路では歪の低減並びにスレショール
ドの改善がFM検波回路の性能を評値する設計目標とな
りている。スレショールドの改善には第1図に示すPL
L検波回路およびFM負@遣回路がある。第1図に示す
PLL検波回路はアンテナ1、RFユニット2、中間周
波増幅器3を介してPLL回路4の端子4&から人力さ
れるFM信号を検波する。検波された復調信号はローパ
スフィルタロの出側から端子4bを介してオーディオ回
路8を経由してスピーカ9へ送られる。PLL検波回路
はローパスフィルタ6から電圧制御発振器7、位相比較
器5への帰還によりスレショールドが改善される。位相
歪の低減とスレショールドの改善を同時に行なったFM
検波回路に第2図に示す回路が提案されている。第2図
に示す回路の通過帯域はバンドパスフィルタ11の前段
混合器10の入側と後段混合器12の出側の周波数が等
しくなるような和周波数および差周波数を得るよう形成
されている。このため、入力信号が変化するとパ/トノ
Rスフイルタの通過帯域は変化してしまうが、同量の変
化を端子13aを介して電圧制御発振器13へ加えれば
バンドパスフィルタ11の通過帯域は変化しない。他に
第3図に示すパルスカウント検波器16があシ非直線性
回路を通さないので低歪でFM検波を行なえる。第3図
中符号17はリミッタ、18は微分回路、19は単安定
マルチパイブレーク、20は積分回路である。
Generally, in FM detection circuits, reduction of distortion and improvement of threshold are design goals for evaluating the performance of FM detection circuits. To improve the threshold, use the PL shown in Figure 1.
There is an L detection circuit and an FM negative @ sending circuit. The PLL detection circuit shown in FIG. 1 detects an FM signal manually input from terminal 4& of a PLL circuit 4 via an antenna 1, an RF unit 2, and an intermediate frequency amplifier 3. The detected demodulated signal is sent from the output side of the low-pass filter via the terminal 4b to the audio circuit 8 and to the speaker 9. The threshold of the PLL detection circuit is improved by feedback from the low pass filter 6 to the voltage controlled oscillator 7 and the phase comparator 5. FM that simultaneously reduces phase distortion and improves threshold
A circuit shown in FIG. 2 has been proposed as a detection circuit. The pass band of the circuit shown in FIG. 2 is formed to obtain a sum frequency and a difference frequency such that the frequencies at the input side of the front mixer 10 and the output side of the rear mixer 12 of the band pass filter 11 are equal. Therefore, if the input signal changes, the passband of the bandpass filter 11 will change, but if the same amount of change is applied to the voltage controlled oscillator 13 via the terminal 13a, the passband of the bandpass filter 11 will not change. . In addition, since the pulse count detector 16 shown in FIG. 3 does not pass through any nonlinear circuit, FM detection can be performed with low distortion. In FIG. 3, reference numeral 17 is a limiter, 18 is a differentiating circuit, 19 is a monostable multi-pie break, and 20 is an integrating circuit.

上述した従来の回路例で歪とスレシ、−ルドの改善を同
時に行なう回路は第2図に示す回路とFM負帰還回路(
第2図点線の部分)とを合成したものである。しかし、
この回路は混合器を2個用いなければならない欠点を有
している。
In the conventional circuit example described above, a circuit that simultaneously improves distortion, threshold, and lead is the circuit shown in Figure 2 and the FM negative feedback circuit (
This is a composite of the dotted line portion in Figure 2). but,
This circuit has the disadvantage of requiring the use of two mixers.

本発明は上述した点にかんがみなされたものでPLL回
路の電圧制御発振器で生成される発振信号を検波するこ
とによυ歪とスレショールドを改善したFM検波器を提
供することを目的とする。
The present invention has been made in consideration of the above points, and an object of the present invention is to provide an FM detector that improves υ distortion and threshold by detecting an oscillation signal generated by a voltage controlled oscillator of a PLL circuit. .

以下、本発明によるFM検波回路の一実施例を図面にし
たがりて説明する。
An embodiment of the FM detection circuit according to the present invention will be described below with reference to the drawings.

第3図と第1図で同一のものには同一符号を付しである
から説明を省略する。
Components that are the same in FIG. 3 and FIG. 1 are designated by the same reference numerals, so their explanation will be omitted.

第3図において、4はPLL回路である。PLL回路4
は中間周波増幅器3を介して端子daKFM化号を入力
される。端子4aに入力されたFM信号は位相比較器5
、ロー/4′スフイルタロ、電圧制御発振器7を経由し
たPLLルーゾで電圧制御発振器7の発振信号を口、り
する。ローフ4スフイルタロから端子4bを介してオー
ディオ回路8へ復調信号を出力する回路は切断され、電
圧制御発振器の出力側が端子4Cを介してパルスカウン
ト検波器16の入側と接続される。パルスカウント検波
器16から出力される復調信号はオーディオ回路8を介
してスピーカ9に送られる。
In FIG. 3, 4 is a PLL circuit. PLL circuit 4
is inputted via the intermediate frequency amplifier 3 to the terminal daKFM encoded signal. The FM signal input to the terminal 4a is sent to the phase comparator 5.
The oscillation signal of the voltage controlled oscillator 7 is output by the PLL Luzo which passes through the low/4' filter and the voltage controlled oscillator 7. The circuit that outputs the demodulated signal from the loaf filter to the audio circuit 8 via the terminal 4b is disconnected, and the output side of the voltage controlled oscillator is connected to the input side of the pulse count detector 16 via the terminal 4C. The demodulated signal output from the pulse count detector 16 is sent to the speaker 9 via the audio circuit 8.

上記実施例におけるFM検波回路では電圧制御発振器7
の非直線性による歪を含む端子4bの復調信号を用いず
、電圧制御発振器7の発振信号を使用するようになって
いる。発振信号はFM信号に同期しフェーズノイズが減
少しているのでノ9ルスカウント検波器16で検波され
た復調信号の歪は低減され、かつ、スレショールドが改
善される。
In the FM detection circuit in the above embodiment, the voltage controlled oscillator 7
The oscillation signal of the voltage controlled oscillator 7 is used instead of the demodulated signal of the terminal 4b which includes distortion due to non-linearity. Since the oscillation signal is synchronized with the FM signal and the phase noise is reduced, the distortion of the demodulated signal detected by the pulse count detector 16 is reduced and the threshold is improved.

本発明によるFM検波器はPLL回路とPLL回路の電
圧制御発振器から出力される発振信号を検波する検波手
段とを具備した構成としであるため、検波されるFM信
号は同期した発振信号を検波する特長を有している。こ
のため電圧制御発振器による非直線性に係わる歪が低減
される効果があシ、同時にスレショールドが改善される
。また、IC化された回路で回路が形成できる等各種利
便が期待できる。
Since the FM detector according to the present invention has a configuration including a PLL circuit and a detection means for detecting an oscillation signal output from a voltage controlled oscillator of the PLL circuit, the FM signal to be detected is a synchronized oscillation signal. It has special features. This has the effect of reducing distortion related to nonlinearity caused by the voltage controlled oscillator, and at the same time improves the threshold. In addition, various conveniences such as being able to form circuits using IC circuits can be expected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図1M2図は従来のFM検波回路のブロック図、第
3図は本発明によるFM検波回路の一実施例を示すブロ
ック図である。 図中符号1はアンテナ、2はRFユニット、3は中間周
波増幅器、4tiPLL回路、5は位相比較器、6はロ
ーパスフィルタ、7.13は電圧制御発振器、8はオー
ディオ回路、9はスピーカ、10.12は混合器、11
はノ4ンドパスフィルタ2.14118N器、15はロ
ーパスフィルタ、16はパルスカウント検波器、17は
リミッタ、18は微分回路、19は単安定マルチバイブ
レータ、20は積分回路である。 特許出願人 八重洲無線株式会社 第 11!1 M2F!!J 13a 笛 3gg
FIG. 1M2 is a block diagram of a conventional FM detection circuit, and FIG. 3 is a block diagram showing an embodiment of the FM detection circuit according to the present invention. In the figure, 1 is an antenna, 2 is an RF unit, 3 is an intermediate frequency amplifier, 4tiPLL circuit, 5 is a phase comparator, 6 is a low-pass filter, 7.13 is a voltage controlled oscillator, 8 is an audio circuit, 9 is a speaker, 10 .12 is a mixer, 11
15 is a low-pass filter, 16 is a pulse count detector, 17 is a limiter, 18 is a differentiation circuit, 19 is a monostable multivibrator, and 20 is an integration circuit. Patent applicant Yaesu Musen Co., Ltd. No. 11!1 M2F! ! J 13a whistle 3gg

Claims (1)

【特許請求の範囲】[Claims] 1、FM信号と電圧制御発振器から出力される発振信号
との位相を比較する位相比較器と、位相比較器の出力信
号を入力され誤差信号を出力するローパスフィルタと、
誤差信号を入力される上記電圧制御発振器と、上記発振
信号を検波する検波手段と、を具備したことを特徴とす
るFM検波回路。
1. A phase comparator that compares the phase of the FM signal and the oscillation signal output from the voltage controlled oscillator, and a low-pass filter that receives the output signal of the phase comparator and outputs an error signal;
An FM detection circuit comprising: the voltage controlled oscillator to which an error signal is input; and detection means for detecting the oscillation signal.
JP20712083A 1983-11-04 1983-11-04 Fm detection circuit Pending JPS6098707A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20712083A JPS6098707A (en) 1983-11-04 1983-11-04 Fm detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20712083A JPS6098707A (en) 1983-11-04 1983-11-04 Fm detection circuit

Publications (1)

Publication Number Publication Date
JPS6098707A true JPS6098707A (en) 1985-06-01

Family

ID=16534520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20712083A Pending JPS6098707A (en) 1983-11-04 1983-11-04 Fm detection circuit

Country Status (1)

Country Link
JP (1) JPS6098707A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5237892A (en) * 1975-09-20 1977-03-24 Hisao Funabashi Transfer printing method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5237892A (en) * 1975-09-20 1977-03-24 Hisao Funabashi Transfer printing method

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