JPS6096841U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6096841U
JPS6096841U JP19056683U JP19056683U JPS6096841U JP S6096841 U JPS6096841 U JP S6096841U JP 19056683 U JP19056683 U JP 19056683U JP 19056683 U JP19056683 U JP 19056683U JP S6096841 U JPS6096841 U JP S6096841U
Authority
JP
Japan
Prior art keywords
case
semiconductor equipment
semiconductor
metal substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19056683U
Other languages
Japanese (ja)
Inventor
亮一 小林
植川 淳哉
嘉彦 中島
Original Assignee
株式会社三社電機製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社三社電機製作所 filed Critical 株式会社三社電機製作所
Priority to JP19056683U priority Critical patent/JPS6096841U/en
Publication of JPS6096841U publication Critical patent/JPS6096841U/en
Pending legal-status Critical Current

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Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置の縦断、面図、第2図はこの
考案に基づ(半導体装置の1実施例の縦断面図である。 1・・・・・・金属基板、2′・・・・・・ケース、6
・・・・・・半導体素子、9,9・・・・・・電極、1
0.11・・・・・・樹脂層、15・・・・・・薄肉部
FIG. 1 is a vertical cross-sectional view and a cross-sectional view of a conventional semiconductor device, and FIG. 2 is a vertical cross-sectional view of one embodiment of a semiconductor device based on this invention. 1...Metal substrate, 2'. ...Case, 6
... Semiconductor element, 9, 9 ... Electrode, 1
0.11... Resin layer, 15... Thin wall portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 金属基板の上面にケースを設け、このケース内における
上記金属基板上に半導体素子を取付け、この半導体素子
から上記ケースの外部に電極を引出し、上記ケース内部
の全面にわたって上記半導体を内部に埋没させるように
樹脂層を船成させてなる半導体装置において、上記ケー
スに薄肉部を設けたことを特徴とする半導体装置。
A case is provided on the upper surface of the metal substrate, a semiconductor element is mounted on the metal substrate in the case, an electrode is drawn out from the semiconductor element to the outside of the case, and the semiconductor is buried within the entire surface of the inside of the case. What is claimed is: 1. A semiconductor device comprising a resin layer formed on the surface of the semiconductor device, characterized in that the case is provided with a thin wall portion.
JP19056683U 1983-12-09 1983-12-09 semiconductor equipment Pending JPS6096841U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19056683U JPS6096841U (en) 1983-12-09 1983-12-09 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19056683U JPS6096841U (en) 1983-12-09 1983-12-09 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6096841U true JPS6096841U (en) 1985-07-02

Family

ID=30410578

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19056683U Pending JPS6096841U (en) 1983-12-09 1983-12-09 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6096841U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158653A (en) * 1979-05-30 1980-12-10 Nec Corp Hybrid integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158653A (en) * 1979-05-30 1980-12-10 Nec Corp Hybrid integrated circuit device

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