JPS6094832U - 半導体素子 - Google Patents
半導体素子Info
- Publication number
- JPS6094832U JPS6094832U JP18634183U JP18634183U JPS6094832U JP S6094832 U JPS6094832 U JP S6094832U JP 18634183 U JP18634183 U JP 18634183U JP 18634183 U JP18634183 U JP 18634183U JP S6094832 U JPS6094832 U JP S6094832U
- Authority
- JP
- Japan
- Prior art keywords
- recess
- contour
- support plate
- semiconductor element
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は従来の半導体素子の要部の平面図、第2図はそ
のA−A線断面図、第3図は本考案の一実施例の要部の
平面図、第4図はそのB−B線断面図である。
のA−A線断面図、第3図は本考案の一実施例の要部の
平面図、第4図はそのB−B線断面図である。
Claims (1)
- 半導体片が支持板上に固着されるものにおいて、支持板
が半導体片の輪郭よりやや大きい輪郭をもつくぼみと、
該くぼみ中に設けられ、大部分は該くぼみの輪郭に平行
であるが二対の対向する場所に内側に向って突出する部
分を持つ輪郭を有するより深いくぼみを備えたことを特
徴とする半導体素子。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18634183U JPS6094832U (ja) | 1983-12-01 | 1983-12-01 | 半導体素子 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18634183U JPS6094832U (ja) | 1983-12-01 | 1983-12-01 | 半導体素子 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6094832U true JPS6094832U (ja) | 1985-06-28 |
Family
ID=30402512
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18634183U Pending JPS6094832U (ja) | 1983-12-01 | 1983-12-01 | 半導体素子 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6094832U (ja) |
-
1983
- 1983-12-01 JP JP18634183U patent/JPS6094832U/ja active Pending
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