JPS609185A - Semiconductor laser integrated circuit device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor laser integrated circuit device, the surface thereof is flat as a whole, by previously forming an indentation to a semi-insulating semiconductor substrate and fixing a BH type laser so as to be accommodated in said indentation through selective crystal growth technique. CONSTITUTION:An indentation, which has a section in the reverse mesa direction of a semi-insulating GaAs substrate 1 and depth thereof is 1mum-10mum, is formed. Double hetero-crystalline layers 3-6 are grown in the indentation. A Ga0.6Al0.4As layer as said crystalline layer 3 functions as a conductive layer on the N side, but a section under the overhang of SiO2 as a mask is buried when said layer selectively grows, and currents on the N side can be lead out of the section under the overhang. A laser stripe peculiar to a BH type having inverted mesa structure is formed by shaping indentations, width thereof is narrower and shallower than before, on both sides of a region constituting a laser left at the center through mesa etching. The indentations are filled with non-doped P<-> type Ga0.63Al0.37As layers 7 while a mask consisting of SiO2, etc. used for mesa etching is left as it is attached. An electronic circuit is fixed to the surface of the exposed semi-insulating substrate.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a semiconductor laser integrated circuit device in which a semiconductor laser and an electronic circuit having functions such as amplification, modulation, stabilization, and switching are monolithically formed. be.

[Background of the invention]

Until now, as an example of monolithically forming a semiconductor laser and a Nariko circuit, a method of forming a two-story structure using an n-type substrate has been proposed () (Matsueda et al; Japan
n JAP20 (1981) 820-1 p193) and
Method using semi-insulating (SI) substrate (A, Yarive
t al; IEEE Spectrum, May (
1982) p.

38) has been proposed. In order to increase the integration scale, the latter is more advantageous because it can utilize a larger area, but because it creates a step on the element surface, the Heterostw
The present invention provides a planar semiconductor integrated circuit device in which a semiconductor laser of the present invention and a large-scale circuit are monolithically integrated on the same semi-insulating substrate.

[Summary of the invention]

By making a recess in the semi-insulating semiconductor substrate in advance and using selective crystal growth technology to create a BH type laser so that it fits into the recess, it is possible to integrate a semiconductor laser with an overall flat surface. A circuit device t is obtained. Here, it is important to use a semi-insulating semiconductor substrate. By doing this, for semiconductor lasers,
It becomes possible to integrate the electronic circuit part into a large area.

Furthermore, MOCVD (Metalorganic Chemical Vapor: [) Epositjon, also known as OMVPE (organo-electronic integrated circuit), is a process in which electronic circuits are fabricated on a semi-insulating substrate, resulting in a planar optical/electronic integrated circuit with no steps as a whole.

[Embodiments of the invention]

GaAS/GaA on semi-insulating substrate of QaAS
An example of integrating a 7AS double hetero type BH laser and an electronic circuit is shown. The manufacturing process is illustrated in order in FIGS. 1 (1) to (5). First, as shown in FIG. 1(1), a recess with a depth of 1 μm to 10 μm and having a cross section as shown in the figure is formed in the reverse mesa direction of the semi-insulating GaAS substrate 1.

In particular, a depth of 3 to 5 μm is practical.

A large rod is good if the width is 10 μm or more, but <50 μm
The degree of irradiation is appropriate in terms of the quality of the crystal grown inside and also in terms of not increasing the area occupied by the laser part. This recess is made by CVD method or sputtering method. .

513N4 or the like is used as the mask 2. Next, with this mask attached, double heterocrystalline layers 3.4, 5.
and grow 6. In addition, similar selective growth can also be performed by LPE (liquid phase epitaxial) method, MBE (molecular beam epitaxial) method, or the like. For example, the specifications for each layer are as follows. 3 is an n-type G with a carrier concentration of I x 1018Iyn-'' doped with Se.
2IXn thick layer of ao, At, As, 4 is a laser active layer, undoped, carrier concentration 1016 cm
-3 Gao, 0. A/! ,. ,. 0.1μm of 4AS
Thick layer, 5 doped with Zn, 3-5 X 10
"cm-3 p-type Gao7□Ato, 28AS 1.
0 μm thick layer, 6 doped with Zn, IX 10
19cm-3 p-type GaAs thickness 0.5μrr
l) It is a layer. In particular, Ga (16AAo4
The AS layer becomes a conductive layer on the n-side, and when this layer is selectively grown, it fills under the overhang of the mask 8102 so that current can be taken out on the n-side from this part, as shown in the figure. Make it. For this purpose, MOCVD
Crystal growth by method is suitable. This layer also needs to be sufficiently thick in order to secure a stream outlet.

Next, one end 8102 and the polycrystalline GaA deposited thereon.
After chemically removing S/GaAtAj or the like using a photoresist pattern, a new mesa etching mask of SiO2 or the like is formed by CVD or sputtering. After that, as shown in Fig. 1 (3), by so-called mesa etching, a recess that is narrower and shallower than before is formed on both sides of the region where the laser groove is to be formed, leaving it in the center. Forms a laser stripe unique to the BH type with a mesa structure. The etching here is
Stop at just the depth where the active layer is removed. That is, in the case of this embodiment, it is 1.6 μm.

Next, with the 8102 mask used for mesa etching still attached, the recess was filled with non-doped p'' type Gao 63At0.
．． Fill with a layer 7 of approximately 1.6 μm thick of 37A S. The carrier concentration of this layer is less than 1014 cm-3, and it becomes an electrical barrier wall with high resistivity. With this embedding, BH
The mold laser is completed. The SiQ used for the mask and GaAtAS deposited thereon are all removed using a photoresist pattern.

Thereafter, an electronic circuit is built on the exposed surface of the semi-insulating substrate. First, the active region 10 and the ohmic electrode region 11 are formed by Si ion implantation. Area 10
For example, Si is implanted accelerated to 125 kV so that the carrier concentration after annealing is 11 zo2 x 10" cm-3, and in 11, Si is implanted at 150 kV and the carrier concentration after annealing is 6 to 7 x 10" cm. After the implantation, annealing was performed at 800C in an As atmosphere for about 30 minutes to activate the implanted ions.Next, the ohmic electrodes 13 and 14 were made of AuGeNi.
It was made by sequential vapor deposition of alloy and Au, lift-off, and alloying. Alloying is done in H,2 atmosphere, 4
By heating at 00C for 3 minutes. It is desirable to perform the previous ion implantation at 7th and 9th to improve the ohmic contact of the n-side electrode portion of the laser.

Next, a Schottky electrode and a p-side electrode 12 of the laser were formed by sequential deposition and lift-off of Ti/Pt/Au. For the p-side pole of the laser, add Zn to a depth of 0.5 μm in advance in Figure 1 (5).
As shown in , ampoule diffusion is desirable because it has the effect of lowering the voltage drop at the electrode. However, if the carrier concentration of 6 is sufficiently high from the crystal growth stage, Zn
There is no need for ampoule diffusion, which simplifies the process.

Next, wiring is established between the metal electrodes. To do this, first, PSG (IJ glass), which will serve as an intermetallic insulating film, is coated on the entire surface with a 0.0-.
It is attached to a thickness of 6 μm using the CVD method, and contact holes are drilled at the required locations. By sequentially depositing Mo/Au on this and forming a pattern by ion milling, necessary wiring between the laser and the electronic circuit section and within the electronic circuit section is performed.

Finally, the end face of the laser is formed by opening the valve or etching (wet and dry) to produce the desired
Obtained an electronic integrated circuit.

By selective crystal growth according to the present invention, an n-side electrode could be formed on a semi-insulating substrate without forming a step on the surface. For this reason, it was possible to create sufficiently fine patterns in the electronic circuit section using photolithography. In the evening, several FE'I's with a gate length of 1 μm were fabricated. By being able to shorten the gate length, the circuit can operate at high frequencies, and this device as a whole has
It has been confirmed that it responds to 2GHz signals.

Another real sister example is shown in Figure 2. Basically, the manufacturing process is the same as that shown in Figure 1, but by making the polarity of p and n so that the inverted p type is reversed, a drowsy isolation is achieved. In FIG. 2, the same reference numerals as in FIG. 1 indicate the same metropolitan area.

Both of the groove formations shown in FIGS. 1 and 2 can be implemented in the same manner even if the conductivity types of the semiconductors are switched between p type and n type.

Furthermore, the present invention is applicable not only to GaAS/GaAtAS but also to In
Needless to say, the present invention can be widely applied to semiconductor materials such as P/InGaASP that can generally be used to construct semiconductor lasers.

〔Effect of the invention〕

By applying the present invention, it was possible to fabricate a BH-type low-threshold, mode-controlled laser and an electronic circuit having a fine pattern on a semi-insulating substrate -F without creating a step.

As an integrated circuit device including a semiconductor radar and an electronic circuit, it was possible to operate at a high frequency of 2GH2 or higher.

[Brief explanation of drawings]

FIGS. 1 (1) to (5) are cross-sectional views of members showing the manufacturing process of the semiconductor laser integrated circuit device of the present invention, and FIG. Impurity diffusion layer, 9.
...Ohmic electrode, 10...FET active region, 1
1... Ohmic electrode, 12, 13.14... Electrode. Patent applicant Hirobe Kawada, Director of the Agency of Industrial Science and Technology

Claims (1)

[Scope of Claims] 1. A first cladding layer 1 having a desired first G recess in a predetermined semi-insulating substrate and forming at least a semiconductor laser portion by selective epitaxial method in the first recess, and an active layer. and a second cladding layer is laminated thereon, further comprising at least a buried layer for embedding each of these layers from both sides in the recess, and a desired electronic circuit is formed in the semi-insulating substrate in a region other than the first recess. A semiconductor laser integrated circuit device characterized by: 2. A second recess is provided in the first cladding layer,
The semiconductor laser integrated circuit device according to claim 1, wherein at least an active layer, a second cladding layer, and the buried layer are provided in the second recess.